qt1100a Quantum Research Group, qt1100a Datasheet - Page 29

• Manufacturer Part Number: qt1100a
• Description: 10 Key Qtouch? Sensor Ic
• Manufacturer: Quantum Research Group

SE in Standalone Mode: SE is automatically enabled (= 1)
in standalone mode when no EEPROM is present.
SYNC Mode: If SYNC = 0, the device uses the Sync pin to
communicate to another similar part (e.g. one or more
additional QT1100A’s). QT1100A’s connected together in
this way will self- synchronize so that they all acquire on Key
0 at the same time. Provided that the devices run at a similar
clock rate and have the same burst spacing (BS) parameters
the devices will remain locked over their full acquisition
cycles, key for key. In this condition it is easy to design a
PCB where keys from multiple QT1100A’s are physically
adjacent but not of the same key number; thus ensuring that
adjacent keys are never acquiring at the same time and
cannot interfere with each other.
Level Mode: If SYNC = 0, the device operates in a level
sensing mode. The open-drain SYNC pin is pulled low by
each device that is currently sensing on any key but key 0.
After the last key is sensed (key 9) the device floats the
SYNC pin and then waits until the SYNC pin actually floats
high. Any other devices sharing the SYNC pin will also clamp
the SYNC pin low until they are done sensing all their keys.
Finally when all devices are waiting to start acquiring on key
0, the SYNC line will actually float high, and the sensor
devices will then all acquire key 0 in unison.
Edge Mode: If SYNC = 1, the part waits for a positive edge
on the SYNC pin to begin acquiring on key 0. Thereafter the
other keys also acquire in sequence according to the BS
setup.
SYNC = 1 should be used for external noise source or power
line synchronization. A simple RC circuit can be connected
from a mains supply to the SYNC pin to ensure phase-
aligned triggering. SYNC can operate from 10Hz ~ 400Hz.
If SE = 1 in UART mode, holding pin RX = 0 for excessive
periods, or in SPI mode, holding pin /SS = 0, will prevent
proper operation of SYNC. Since communication has higher
priority than SYNC, communicating during a SYNC active
edge will cause an additional delay of the SYNC process and
result in timing skews. Holding either /SS or RX low
continuously will inhibit SYNC.
These control bits apply to the device as a whole.
4.13 LBLL - Lower Burst Length Limit
Byte 33
Default value:
Typical value:
LBLL is an FMEA-oriented limits feature used to detect keys
that are not operating properly. If a key is short circuited, or
its Cs/Rs sensing circuit has failed, the acquired signal will
be either one count or attempt to be infinite.
Lower errors are caught using the LBLL parameter which
can be set from 0 to 255. If {signal < LBLL}, the key is
flagged as having an error and the acquisition burst for that
key is also disabled until the part is reset or the key is
recalibrated. Setting LBLL = 0 will disable this error detection
feature and also stop the ability of a key to be self-disabled if
there is a serious hardware error.
A better method for disabling the LBLL feature is to set it to a
very low value such as 3. This way the device can still stop
acquiring on channels that have serious hardware problems,
yet not generate errors when signals are merely very low.
If LBLL is set too high, it could cause legitimate touch
detections to trigger an error flag and self-disable a channel.
LQ
3
50 - 100
29
Upper errors are caught using a built-in, fixed upper burst
length limit of 4095; beyond this value of signal, the key is
tagged as being in error.
4.14 BS - Burst Spacing Control Bits
Byte 34, Bits 4,3,2
Default value:
Typical values: 1 - 4
The interval of time from the start of a burst on one key to
the start of the burst on the next key is known as the burst
spacing. This is an alterable parameter which affects all
keys. The burst spacing can be viewed as a timeslot in which
an acquisition burst occurs. This approach results in an
orderly and predictable sequencing of key scanning with
predictable response times.
Shorter spacings result in a faster response time to touch;
longer spacings permit higher burst lengths and longer
conversion times but slow down response time.
Standard BS settings from 2ms to 7ms are available. BS
should be set so that the acquire burst lengths themselves
are fully contained in their timeslots, plus 500µs left over.
This can be determined by using a 10x scope probe with a
470K resistor in series and examining the length of the
distorted waveform (this is done to minimize loading effects
which reduce the burst length).
If an acquisition burst exceeds its timeslot, the device will still
operate properly except that time based parameters will be
increased in duration; the timeslots will expand to fill the
burst length which is always variable.
The BS value is obtained via a lookup table (LUT) :
4.15 BR - Baud Rate Control Bits
Byte 34, Bits 1, 0
Default value:
The BR setting allows control over the baud rate, from 4800
to 28.8K Baud according to the following table:
If the Baud rate is altered via serial communications, the new
Baud rate is effective immediately after the Setup block
loads are complete, that is, after the QT1100A sends the
final response from the Load Setup command (0x01).
BS Value
BR Value
2 (3ms)
1 (9600)
0
1
2
3
4
5
6
7
Copyright © 2003-2005 QRG Ltd
0
1
2
3
QT1100A-ISG R3.02/1105
Setting
Setting
2.0ms
2.5ms
3.0ms
3.5ms
4.0ms
5.0ms
6.0ms
7.0ms
19,200
28,800
4,800
9,600