lm9076qbmax-5.0 National Semiconductor Corporation, lm9076qbmax-5.0 Datasheet - Page 11
![no-image](/images/no-image-200.jpg)
lm9076qbmax-5.0
Manufacturer Part Number
lm9076qbmax-5.0
Description
150ma Ultra-low Quiescent Current Ldo Regulator With Delayed Reset Output
Manufacturer
National Semiconductor Corporation
Datasheet
1.LM9076QBMAX-5.0.pdf
(14 pages)
Application Information
REGULATOR BASICS
The LM9076Q regulator is suitable for Automotive and Indus-
trial applications where continuous connection to a battery
supply is required (refer to the Typical Application circuit).
The pass element of the regulator is a PNP device which re-
quires an output bypass capacitor for stability. The minimum
bypass capacitance for the output is 10 μF (refer to ESR lim-
itations). A 22 μF, or larger, output bypass capacitor is rec-
ommended for typical applications
INPUT CAPACITOR
The LM9076Q requires a low source impedance to maintain
regulator stability because critical portions of the internal bias
circuitry are connected to directly to V
electrolytic capacitor, located within two inches of the
LM9076Q, is adequate for a majority of applications. Addi-
tionally, and at a minimum, a 0.1 μF ceramic capacitor should
be located between the LM9076Q V
as close as is physically possible to the LM9076Q itself .
OUTPUT CAPACITOR
An output bypass capacitor is required for stability. This ca-
pacitance must be placed between the LM9076Q V
and Ground pin, as close as is physically possible, using
traces that are not part of the load current path.
The output capacitor must meet the requirements for mini-
mum capacitance and also maintain the appropriate ESR
value across the entire operating ambient temperature range.
There is no limit to the maximum output capacitance as long
as ESR is maintained.
The minimum bypass capacitance for the output is 10 μF (re-
fer to ESR limitations). A 22 μF, or larger, output bypass
capacitor is recommended for typical applications.
Solid tantalums capacitors are recommended as they gener-
ally maintain capacitance and ESR ratings over a wide tem-
perature range. Ceramic capacitor types XR7 and XR5 may
be used if a series resistor is added to simulate the minimum
ESR requirement. See
Aluminum electrolytic capacitors are not recommended as
they are subject to wide changes in capacitance and ESR
across temperature.
DELAY CAPACITOR
The capacitor on the Delay pin must be a low leakage type
since the charge current is minimal (420 nA typical) and the
pin must fully charge to V
polystyrene capacitor types are generally recommended, al-
though changes in capacitance values across temperature
changes will have some effect on the delay timing.
Any leakage of the I
pacitor or any other path, will extend the delay time, possibly
to the point that the Reset pin output does not go high.
FIGURE 1. Using Low ESR Capacitors
DELAY
Figure
current, be it through the delay ca-
1.
OUT
. Ceramic, Mylar, and
IN
IN
and Ground pin, and
. In general, a 10 μF
30154348
OUT
pin
11
SHUTDOWN PIN - LM9076QBMA ONLY
The basic On/Off control of the regulator is accomplished with
the SHUTDOWN pin. By pulling the SHUTDOWN pin high the
regulator output is switched Off. When the regulator is
switched Off the load on the battery will be primarily due to
the SHUTDOWN pin current.
When the SHUTDOWN pin is low, or left open, the regulator
is switched On. When an unregulated supply, such as V BAT-
TERY , is used to pull the SHUTDOWN pin high a series
resistor in the range of 10KΩ to 50KΩ is recommended to
provide reverse voltage transient protection of the SHUT-
DOWN pin. Adding a small capacitor (0.001uF typical) from
the SHUTDOWN pin to Ground will add noise immunity to
prevent accidental turn on due to noise on the supply line.
RESET FLAG
The RESET pin is an open collector output which requires an
external pull-up resistor to develop the reset signal. The ex-
ternal pull-up resistor should be in the range of 10 kΩ to 200
kΩ.
At V
will be high. For V
imately V
V
SET pin voltage will be dependent on the status of the V
pin voltage and the Delayed Reset circuitry. The value of
V
mately 2 mV for every 1°C increase in the junction tempera-
ture. During normal operation the RESET pin voltage will be
high .
Any load condition that causes the V
below typically 89% of normal will activate the Delayed Reset
circuit and the RESET pin will go low for the duration of the
delay time.
Any line condition that causes V
typically V
out activating the Delayed Reset circuitry.
Excessive thermal dissipation will raise the junction temper-
ature and could activate the Thermal Shutdown circuitry
which, in turn, will cause the RESET pin to go low.
For the LM9076QBMA devices, pulling the SHUTDOWN pin
high will turn off the output which, in turn, will cause the RE-
SET pin to go low once the V
value that is less than typically 89% of normal. See
RESET DELAY TIME
When the regulator output is switched On, or after recovery
from brief V
programmed to remain low for an additional delay time. This
will give time for any system reference voltages, clock signals,
etc., to stabilize before the micro-controller resumes normal
operation.
This delay time is controlled by the capacitor value on the
C
charged to near V
SET pin to go low, the C
to ground. When the V
to the normal operating value, the C
charging at a typical constant 0.420 uA rate. When the voltage
on the C
V
The typical RESET delay time can be calculated with the fol-
lowing formula:
IN
BE
OUT
DELAY
values greater than approximately V
IN
is typically 600 mV at 25°C and will decrease approxi-
pin the RESET pin will be allowed to return high.
values of less than typically 2V the RESET pin voltage
pin. During normal operation the C
DELAY
OUT
OUT
OUT
+ V
+ V
capacitor reaches the same potential as the
fault condition, the RESET flag can be can be
BE
BE
IN
OUT
values between typically 2V and approx-
will cause the RESET pin to go low with-
the RESET pin voltage will be low. For
OUT
. When a V
DELAY
fault is removed, and V
capacitor is quickly discharged
OUT
IN
voltage has decayed to a
pin voltage to drop below
OUT
OUT
DELAY
fault causes the RE-
OUT
pin voltage to drop
DELAY
capacitor begins
+ V
www.national.com
capacitor is
BE
OUT
Figure
the RE-
returns
OUT
2.