sclt3-8bt8-tr STMicroelectronics, sclt3-8bt8-tr Datasheet - Page 25

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sclt3-8bt8-tr

Manufacturer Part Number
sclt3-8bt8-tr
Description
Protected Digital Input Termination With Serialized State Transfer
Manufacturer
STMicroelectronics
Datasheet

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SCLT3-8BT8
3.1.1
3.2
Interfacing the SPI section to the I/O controller through optotransistors
Figure 18. Opto-couplers connection between dual SCLT circuit and their master
High speed operation with magnetic isolators
Figure 19. Connection of SCLT with a magnetic or capacitive coupler for alarm
Magnetic isolators are suitable for higher frequency operation, above 1 MHz, because of
their lower current consumption.
But their primary power supply loss leads to a high state output that is not compatible with
an alarm strategy active in low state as with SCLT. To overcome this issue, two inverting
logic buffers can be implemented in the SPI hardware chain. The ASIC will also detect a
primary supply loss with a low state. The SCLT is designed providing both MISO and /MISO
in order to simplify this hardware environment as shown on
SPI data output
Alarm = low
5V.REG
5V.REG
SCLT3 - 8
SCLT
SCLT
bus controller
active in low level
V
DD1
SPI
SPI
SCK
MISO
COM
OFF
OFF
LED
LED
ON
ON
V
DD1
S
Doc ID 15191 Rev 3
V
V
V
V
330W
330W
DD1
DD1
DD1
DD1
HIGH
HIGH
LOW
LOW
V
V
OUT
OUT
C
100nF
R
CK
CK
V
MISO
MISO
/MISO
/MISO
DD2
F
F
< 1MHz
< 1MHz
ACPL-W70L
CK
CK
V
OUT
V
V
Isolator
DD1
DD1
330W
100nF
ACPL-K73L
V
V
To LED
R
R
330W
DD2
DD2
R
CK
CK
MI
, R
, R
Figure
220
220Ω
C
330W
CS
CS
MI
Application considerations
MISO
, R
, R
SCK
V
V
/CS
DD2
DD2
MI
MI
19.
MISO
MISO
C
C
CK
CK
470pF
470pF
SPI master
, C
, C
Controller
V
DD2
CS
CS
SPI master
, C
, C
MI
MI
V
V
DD2
DD2
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