pdiusbh12 NXP Semiconductors, pdiusbh12 Datasheet - Page 12

• Manufacturer Part Number: pdiusbh12
• Description: Usb 2-port Hub
• Manufacturer: NXP Semiconductors

Philips Semiconductors
Configuration Byte
Remote Wakeup
No LazyClock
Clock Running
Debug Mode
SoftConnect
1999 Jul 22
USB 2-port hub
7
1
6
0
5
0
4
0
3
1
2
1
1
0
0
1
POWER ON VALUE
REMOTE WAKEUP
NO LAZYCLOCK
CLOCK RUNNING
DEBUG MODE
SoftConnect
CONNECT DOWNSTREAM RESISTORS
NON-BLINKING LEDs
EMBEDDED FUNCTION MODE
A ‘1’ indicates that a remote
wakeup feature is ON. Bus reset
will set this bit to ‘1’.
A ‘1’ indicates that CLKOUT will
not switch to LazyClock. A ‘0’
indicates that the CLKOUT
switches to LazyClock 1ms after
the Suspend pin goes high.
LazyClock frequency is 30KHz (
40%). The programmed value will
not be changed by a bus reset.
clocks and PLL are always
running even during Suspend
state. A ‘0’ indicates that the
internal clock, crystal oscillator
and PLL are stopped whenever
not needed. To meet the strict
Suspend current requirement, this
bit needs to be set to ‘0’. The
programmed value will not be
changed by a bus reset.
A ‘1’ indicates that all errors and
“NAKing” are reported and a ‘0’
indicates that only OK and
babbling are reported. The
programmed value will not be
changed by a bus reset.
A ‘1’ indicates that the upstream
pull-up resistor will be connected if
VBUS is available. A ‘0’ means
that the upstream resistor will not
be connected. The programmed
value will not be changed by a bus
reset.
A ‘1’ indicates that the internal
SV00842
12
Connect Downstream Resistors A ‘1’ indicates that downstream
Non-blinking LEDs
Embedded Function Mode
Clock Division Factor Byte
Clock Division Factor
X X
X X
7
6
5
0
1
4
0
1
3
0
1
2
0
0
1
1
1
0
1
1
POWER ON VALUE FOR 48MHz INPUT
POWER ON VALUE FOR 12MHz INPUT
CLOCK DIVISION FACTOR
RESERVED
resistors are connected. A ‘0’
means that downstream resistors
are not connected. The
programmed value will not be
changed by a bus reset.
A ‘1’ indicates that GoodLink
LEDs will NOT blink when there is
traffic. Leave this bit at ‘0’ to
achieve blinking LEDs. The
programmed value will not be
changed by a bus reset.
A ‘1’ indicates single embedded
function mode. A ‘0’ indicates
multiple (3) embedded function
mode. See endpoint descriptions
for details. The programmed value
will not be changed by a bus
reset.
The value indicates clock division
factor for CLKOUT. The output
frequency is 48 MHz/(N+1) where
N is the Clock Division Factor. The
reset value is 3. This will give a
default output frequency at
CLKOUT pin of 12 MHz, thus
maintaining backward
compatibility to the PDIUSBH11.
When the 12 MHz input crystal
frequency is selected, the reset
value is 11. This will produce the
lowest output frequency of 4 MHz
which can then be programmed
up by the user. The PDIUSBH12
design ensures no glitching during
frequency change. The
programmed value will not be
changed by a bus reset.
PDIUSBH12
Product specification
SV00843