ncn6000 ON Semiconductor, ncn6000 Datasheet - Page 17

• Manufacturer Part Number: ncn6000
• Description: Compact Smart Card Interface Ic
• Manufacturer: ON Semiconductor

Transaction Mode
power supply and clock signal to the card. All the signal
levels related with the card are translated as necessary to
cope with the MPU and the card.
monitored on the STATUS by using the A0 and A1 logic
inputs as depicted in Tables 3 and 4.
is recommended to check the state of CRD_VCC before
launching a new data transaction. Since CS = L, this is
achieved by forcing bits A0 and A1 according to Table 4, and
reading the STATUS pin 5.
Idle Mode
(CRD_VCC = Vcc), without communication on going.
Transaction Mode
Logic Conditions:
CS
PWR_ON = H
A0
A1
PGM
I/O
RESET
STATUS
Idle Mode
Logic Conditions:
CS
PWR_ON = H
A0
A1
PGM
I/O
RESET
STATUS
During the transaction mode, the NCN6000 maintains
The DC−DC converter status and the Vbat state can be
To make sure the data are not polluted by power losses, it
The idle mode is used when a card is powered up
= L/H DC−DC
= L
= H
= H
= H
= DATA
= H/L
= L
= H
= H
= H
= Z
= H
= L/H according
TRANSFER
status: Fail/Pass?
to the internal
register results
Card Output:
CRD_VCC = 3.0 or 5.0 V
CRD_CLK = CLOCK active or
CRD_RST = H
CRD_IO
Card Output:
CRD_VCC = 3.0 or 5.0 V
CRD_CLK = CLOCK
CRD_RST = H/L
CRD_IO
= Z
L or H
= DATA
TRANSFER
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NCN6000
17
depicted in Tables 3 and 4, to minimize the current
consumption of the external smart card, leaving CRD_VCC
active.
Power Down Operation
external MPU (pulling PWR_ON = L) or by one of the
internal error condition (CRD_VCC overload or Vbat Low).
The communication session is terminated immediately,
according to the ISO7816−3 sequence. On the other hand,
the MPU can run the Standby mode by forced CS = H.
operation and run the Power Shut Off of the card as
described by the ISO/CEI 7816−3 sequence depicted here
after:
insertion or extraction, the physical power sequence will be
activated 150 ms maximum after the card has been extracted.
Of course, such a delay does not exist when the MPU launch
the power down intentionally.
500 ns typical (Figure 10).
In addition, the CRD_CLK signal can be stopped, as
The power down mode can be initiated by either the
When the card is extracted, the interface shall detect the
ISO7816−3 sequence:
Since the internal digital filter is activated for any card
The time delay between each negative going signal is
⇒ Force RST to Low
⇒ Force CLK to Low, unless it is already in this state
⇒ Force CRD_IO to Low
⇒ Shut Off the CRD_VCC supply