w83977ctf Winbond Electronics Corp America, w83977ctf Datasheet - Page 67

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w83977ctf

Manufacturer Part Number
w83977ctf
Description
Winbond I/o
Manufacturer
Winbond Electronics Corp America
Datasheet
4.2.6 Bank0.Reg5 - UART Line Status Register (USR)
Power on default <7:0> = 0000,0000 binary
4.2.7 Bank0.Reg6 - Remote Infrared Config Register (RIR_CFG)
Power on default <7:0> = 0000,0000 binary
7-3
7-6
Bit
Bit
2
1
0
Reserved
RX_TO
OV_ERR
RDR
SMPSEL<1:0>
Name
Name
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
-
Set to 1 when receiver FIFO or frame status FIFO
occurs time-out. Read this bit to clear.
Received FIFO overrun. Read to clear.
This bit is set to a logical 1 to indicate received data are
ready to be read by the CPU in the RBR or FIFO. After
no data are left in the RBR or FIFO, the bit will be reset
to a logical 0.
Sampling
methodology from the internal filter. Selected decoder
mode will determine the receive data format. The
sampling mode is shown bellow:
SMPSEL<1:0> = 00 T-Period Sample Mode.
SMPSEL<1:0> = 01 Over-Sampling Mode.
SMPSEL<1:0> = 10 Over-Sampling with re-sync.
SMPSEL<1:0> = 11 FIFO Test Mode.
The T-period code format is defined as follows.
The Bit value is set to 0, when the low signal will be
received. The Bit value is set to 1, when the high signal
will be received. The opposite results will be generated
when the bit RXINV (Bank0.Reg6.Bit0) is set to 1.
-58 -
B7 B6 B5 B4
Mode
Bit value
(Number of bits) - 1
Select.
Publication Release Date: March 1999
Description
Description
W83977EF/ CTF
-
Select
B3
PRELIMINARY
B2 B1 B0
internal
Revision A1
decoder

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