psd311-b-90ui STMicroelectronics, psd311-b-90ui Datasheet - Page 30

• Manufacturer Part Number: psd311-b-90ui
• Description: Low Cost Field Programmable Microcontroller Peripherals
• Manufacturer: STMicroelectronics

14.0
System
Applications
Figure 11. PSD3XX Interface With Intel’s 80C31
In Figure 11, the PSD3XX is configured to interface with Intel’s 80C31, which is a 16-bit
address/8-bit data bus microcontroller. Its data bus is multiplexed with the low-order
address byte. The 80C31 uses signals RD to read from data memory and PSEN to read
from code memory. It uses WR to write into the data memory. It also uses active high reset
and ALE signals. The rest of the configuration bits, as well as the unconnected signals,
are application specific, and thus, user dependent.
NOTE: RESET to the PSD3XX must be the output of a RESET chip or buffer.
Reset
If RESET to the 80C31 is the output of an RC circuit, a separate buffered RC RESET to the
PSD3XX (shorter than the 80C31 RC RESET) must be provided to avoid a race condition.
12
13
14
15
31
19
18
9
1
2
3
4
5
6
7
8
80C31
MICROCONTROLLER
EA/VP
X1
X2
RESET
INT0
INT1
T0
T1
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
PSEN
P0.0
P0.1
P0.2
P0.3
P0.4
P0.5
P0.6
P0.7
P2.0
P2.1
P2.2
P2.3
P2.4
P2.5
P2.6
P2.7
RXD
ALE
TXD
WR
RD
39
38
37
36
35
34
33
32
21
22
23
24
25
26
27
28
17
16
11
10
29
30
23
24
25
26
27
28
29
30
31
32
33
35
36
37
38
39
22
13
2
1
3
AD0/A0
AD1/A1
AD2/A2
AD3/A3
AD4/A4
AD5/A5
AD6/A6
AD7/A7
AD8/A8
AD9/A9
AD10/A10
AD11/A11
AD12/A12
AD13/A13
AD14/A14
AD15/A15
RD
WR/V
BHE/PSEN
ALE
RESET
PSD3XX
V CC
PP
44
GND
0.1µF
A19/CSI
34
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
PC0
PC1
PC2
PSD3XX Family
12
21
20
19
18
17
16
15
14
11
10
9
8
7
6
5
4
40
41
42
43
27