74ahct02pw NXP Semiconductors, 74ahct02pw Datasheet

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74ahct02pw

Manufacturer Part Number
74ahct02pw
Description
74ahc02; 74ahct02 Quad 2-input Nor Gate
Manufacturer
NXP Semiconductors
Datasheet
1. General description
2. Features
3. Ordering information
Table 1.
Type number
74AHC02D
74AHCT02D
74AHC02PW
74AHCT02PW
74AHC02BQ
74AHCT02BQ
Ordering information
Package
Temperature range Name
40 C to +125 C
40 C to +125 C
40 C to +125 C
The 74AHC02; 74AHCT02 is a high-speed Si-gate CMOS device and is pin compatible
with Low-power Schottky TTL (LSTTL). They are specified in compliance with JEDEC
standard JESD7-A.
The 74AHC02; 74AHCT02 provides the quad 2-input NOR function.
74AHC02; 74AHCT02
Quad 2-input NOR gate
Rev. 03 — 7 January 2008
Balanced propagation delays
All inputs have a Schmitt-trigger action
Inputs accepts voltages higher than V
For 74AHC02 only: operates with CMOS input levels
For 74AHCT02 only: operates with TTL input levels
ESD protection:
Multiple package options
Specified from 40 C to +85 C and from 40 C to +125 C
HBM JESD22-A114E exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
CDM JESD22-C101C exceeds 1000 V
SO14
TSSOP14
DHVQFN14 plastic dual in-line compatible thermal enhanced very
Description
plastic small outline package; 14 leads;
body width 3.9 mm
plastic thin shrink small outline package; 14 leads;
body width 4.4 mm
thin quad flat package; no leads; 14 terminals;
body 2.5
3
CC
0.85 mm
Product data sheet
Version
SOT108-1
SOT402-1
SOT762-1

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74ahct02pw Summary of contents

Page 1

... Ordering information Table 1. Ordering information Type number Package Temperature range Name 74AHC02D +125 C 74AHCT02D 74AHC02PW +125 C 74AHCT02PW 74AHC02BQ +125 C 74AHCT02BQ CC Description SO14 plastic small outline package; 14 leads; body width 3.9 mm TSSOP14 plastic thin shrink small outline package; 14 leads; body width 4.4 mm DHVQFN14 plastic dual in-line compatible thermal enhanced very thin quad fl ...

Page 2

... NXP Semiconductors 4. Functional diagram mna216 Fig 1. Logic symbol 5. Pinning information 5.1 Pinning GND 7 Fig 4. Pin configuration SO14 and TSSOP14 5.2 Pin description Table 2. Pin description ...

Page 3

... NXP Semiconductors Table 2. Pin description …continued Symbol Pin GND Functional description [1] Table 3. Function table Input [ HIGH voltage level LOW voltage level don’t care 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134) ...

Page 4

... NXP Semiconductors 8. Recommended operating conditions Table 5. Recommended operating conditions Voltages are referenced to GND (ground = 0 V). Symbol Parameter V supply voltage CC V input voltage I V output voltage O T ambient temperature amb t/ V input transition rise and fall rate 9. Static characteristics Table 6. Static characteristics Voltages are referenced to GND (ground = 0 V) ...

Page 5

... NXP Semiconductors Table 6. Static characteristics Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions For type 74AHCT02 V HIGH-level input voltage V LOW-level input voltage V HIGH-level output voltage 8 LOW-level ...

Page 6

... NXP Semiconductors Table 7. Dynamic characteristics GND = 0 V; For test circuit see Figure Symbol Parameter Conditions For type 74AHCT02 t propagation nA nY; see pd delay power pF dissipation V = GND capacitance [1] Typical values are measured at nominal supply voltage (V ...

Page 7

... NXP Semiconductors PULSE GENERATOR Test data is given in Table 9. Definitions test circuit Termination resistance should be equal to output impedance Load capacitance including jig and probe capacitance Load resistance Test selection switch. Fig 7. Load circuit for switching times Table 9. Test data ...

Page 8

... NXP Semiconductors 12. Package outline SO14: plastic small outline package; 14 leads; body width 3 pin 1 index 1 e DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. 0.25 1.45 mm 1.75 0.25 0.10 1.25 0.010 0.057 inches 0.01 0.069 0.004 0.049 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. ...

Page 9

... NXP Semiconductors TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4 pin 1 index 1 e DIMENSIONS (mm are the original dimensions) A UNIT max. 0.15 0.95 mm 1.1 0.25 0.05 0.80 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. ...

Page 10

... NXP Semiconductors DHVQFN14: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 14 terminals; body 2 0.85 mm terminal 1 index area terminal 1 index area DIMENSIONS (mm are the original dimensions) (1) A UNIT max. 0.05 0. 0.2 0.00 0.18 Note 1 ...

Page 11

... Document ID Release date 74AHC_AHCT02_3 20080107 • Modifications: The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • Legal texts have been adapted to the new company name where appropriate. • Section • Section • ...

Page 12

... Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...

Page 13

... NXP Semiconductors 17. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 4 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 5 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 5.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 5.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 2 6 Functional description . . . . . . . . . . . . . . . . . . . 3 7 Limiting values Recommended operating conditions Static characteristics Dynamic characteristics . . . . . . . . . . . . . . . . . . 5 11 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 12 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 8 13 Abbreviations ...

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