EL5220 Intersil Corporation, EL5220 Datasheet - Page 11

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EL5220

Manufacturer Part Number
EL5220
Description
op Amp, Dual 12MHz, Rail-to-rail I/O, 500uA Per Amp, SR = 10V/us
Manufacturer
Intersil Corporation
Datasheet

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0
when sourcing, and:
when sinking.
where
If we set the two P
can solve for R
and 5 provide a convenient way to see if the device will
overheat. The maximum safe power dissipation can be found
graphically, based on the package type and the ambient
temperature. By using the previous equation, it is a simple
matter to see if P
curves. To ensure proper operation, it is important to
observe the recommended derating curves in Figures 3, 4,
and 5.
i = 1 to 2 for Dual and 1 to 4 for Quad
V
I
V
I
SMAX
LOAD
OUT
S
P
= Total Supply Voltage
DMAX
1200
1000
800
600
400
200
i = Maximum Output Voltage of the Application
i = Load Current
0
FIGURE 3. PACKAGE POWER DISSIPATION
= Maximum Supply Current Per Amplifier
0
JEDEC JESD51-7 High Effective Thermal Conductivity (4-Layer)
Test Board
LPP exposed diepad soldered to PCB per JESD51-5
1.136W
870mW
1.0W
=
Σi
LOAD
θ
DMAX
JA
25
×
MSOP8
DMAX
=115°C/W
[
V
VS AMBIENT TEMPERATURE
i to avoid device overheat. Figures 3, 4,
S
×
Ambient Temperature (°C)
exceeds the device's power derating
50
I
equations equal to each other, we
SMAX
θ
JA
11
TSSOP14
= 100°C/W
+
75
( (
V
85
OUT
θ
100
JA
i
MAX T
SO14
)-V
=88°C/W
S
J
- )
125
= 125°C
×
I
LOAD
150
EL5220, EL5420
i
]
Unused Amplifiers
It is recommended that any unused amplifiers in a dual and a
quad package be configured as a unity gain follower. The
inverting input should be directly connected to the output
and the non-inverting input tied to the ground plane.
Driving Capacitive Loads
The EL5220 and EL5420 can drive a wide range of
capacitive loads. As load capacitance increases, however,
the -3dB bandwidth of the device will decrease and the
peaking increase. The amplifiers drive 10pF loads in parallel
with 10kΩ with just 1.5dB of peaking, and 100pF with 6.4dB
of peaking. If less peaking is desired in these applications, a
small series resistor (usually between 5Ω and 50Ω) can be
placed in series with the output. However, this will obviously
reduce the gain slightly. Another method of reducing peaking
is to add a “snubber” circuit at the output. A snubber is a
shunt load consisting of a resistor in series with a capacitor.
FIGURE 4. PACKAGE POWER DISSIPATION VS AMBIENT
1200
1000
2.5
1.5
0.5
800
600
400
200
3
2
1
0
0
0
JEDEC JESD51-7 High Effective Thermal Conductivity (4-Layer)
Test Board
(LPP exposed diepad soldered to PCB per JESD51-5)
FIGURE 5. PACKAGE POWER DISSIPATION
0
JEDEC JESD51-3 and SEMI G42-88 (Single Layer) Test Board
2.500W
833mW
667mW
606mW
485mW
TEMPERATURE
25
25
θ
θ
VS AMBIENT TEMPERATURE
JA
JA
Ambient Temperature (°C)
MSOP8
=120°C/W
=206°C/W
SO14
Ambient Temperature (°C)
50
50
75
75
85
θ
85
JA
LPP16
=150°C/W
100
θ
JA
100
TSSOP14
MAX T
=165°C/W
125
J
=125°C
125
150
150

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