tea1612t NXP Semiconductors, tea1612t Datasheet - Page 9

• Manufacturer Part Number: tea1612t
• Description: Zero Voltage Switching Resonant Converter Controller
• Manufacturer: NXP Semiconductors

NXP Semiconductors
TEA1612T_1
Product data sheet
7.10 Shut-down
7.11 Latch reset input
7.8 VAUX input
7.9 Burst mode
At start-up the soft start capacitor is charged to V
about 80 % of the maximum frequency. After start-up the external soft start capacitor is
discharged by I
place via R
frequency sweep rate.
When the circuit comes into regulation, the error amplifier output controls the VCO pin
voltage and the CSS voltage sweeps down further to zero volt.
The TEA1612T can start up either via a start-up bleeder resistor (connected to the high
voltage and V
VAUX to V
over. The series regulator is active up to the moment that V
charging to V
In oscillation state the start-up resistor is no longer capable of delivering the V
current, so an auxiliary supply (for instance, via an auxiliary winding or a dV/dt supply)
needs to take over. The VAUX input facilitates a series regulator which regulates its output
voltage (= V
In the application the amount of converted power can be estimated from the actual
operating frequency: the higher the frequency, the lower the output power. This frequency
is proportional to the feedback current to the IRS pin which is measured via a sense
resistor R
When the voltage at the BURST pin exceeds V
(GL, GH) are made inactive (i.e. low). The output drivers are enabled again when the
voltage at the BURST pin falls below the preset voltage at the HYST pin.
The shut-down input on pin SD has an accurate threshold level of 2.33 V. When the
voltage on input SD reaches 2.33 V, the TEA1612T enters shut-down mode.
During shut-down mode, V
input current. This clamp prevents V
current to the TEA1612T in shut-down mode.
When the TEA1612T is in shut-down mode, it can only be activated again by lowering V
to below the V
shut-down latch is then reset and a new start-up cycle can commence.
In shut-down mode the GL pin is high and the GH pin is low. In this way the bootstrap
capacitor remains charged so that after a reset a new cycle can start well defined.
The internal shut-down latch can be reset via the reset input.This input is active low.
fb2
DD
DD
f
(see
) and the frequency sweeps down. The CSS capacitor determines the
) initiates charging of the V
DD(startup)
DD
DD(rst)
) to V
start(soft)
) or via the VAUX input. In the latter case the internal 10 k resistor (from
Figure
DD(reg)
level (typically 5.3 V) or by making the reset input active. The
Rev. 01 — 24 September 2009
. The VCO pin voltage follows the CSS voltage (discharging takes
is done via the internal 10 k resistor.
7). The actual feedback current equals 1/R
.
DD
is clamped by an internal Zener diode at 12.0 V with 1 mA
Zero voltage switching resonant converter controller
DD
rising above the rating of 14 V due to low supply
DD
capacitor after which the series regulator takes
ref(BURST)
VCO(start)
, the TEA1612T output drivers
setting a start-up frequency of
DD
equals V
fb2
TEA1612T
© NXP B.V. 2009. All rights reserved.
DD(reg)
(V
BURST
. Further
DD
supply
V
9 of 19
IRS
DD
).