sc14402vjg National Semiconductor Corporation, sc14402vjg Datasheet - Page 4

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sc14402vjg

Manufacturer Part Number
sc14402vjg
Description
Complete Baseband Processor For Dect Handsets
Manufacturer
National Semiconductor Corporation
Datasheet
Copyright 1998 National Semiconductor Corp.
PIN NAME
SCLK
Vdd
Vss
PD
RFCLK
MEN1n
SO
SK
LKD
RDI
CMPREF
RSSI
AVD
AVS
TDO
P0[0] or
UTX
P0[1] or
URX
P0[2]
P0[3]
P0[4]
P0[5]
P0[6]
P0[7]
P1[0]
P1[1]
P1[2]
P1[3]
P1[4]
2.0 Pin Description
Table 1: Pin Description
7..0
4-11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
1
2
3
5/analog
analog
analog
analog
TYPE
5b
5
5
5
1
5
1
2
3
2
2
2
3
3
2
2
2
2
2
2
DESCRIPTION
OUTPUT (slope controlled). CR16A bus interface System CLocK output.
Digital supply voltage
Digital ground.
TRI-STATE OUTPUT. Power Down pins 7 to 0. PD7,6 have 12 mA drive.
OUTPUT (Slope controlled). 10 MHz clock output. Logic ‘0’ after reset or when dis-
abled.
OUTPUT. Load Enable. Can be synchronized to LKD input
TRI-STATE OUTPUT. Serial data output.
OUTPUT. Serial interface clock: 1.152 MHz
INPUT. LocK Detect input for synchronisation purposes.
INPUT. Received Data. It is programmable to invert this input.
INPUT. Comparator reference level. Internally a six bit DAC can be connected to
this pin to compensate for DC offsets.
INPUT. 6-bit ADC input with peak hold circuitry. Activated on PD0 = low. If PD0 =
high the RSSI input will be discharged to ground.
Analog supply voltage
Analog ground
TRI-STATE OUTPUT. Transmit Data. Can be programmed to be inverted.
INPUT/OUTPUT with selectable pull up resistor. General purpose memory
mapped I/O port bit. UART data output.
INPUT/OUTPUT with selectable pull down resistor. General purpose memory
mapped I/O port bit. UART data input.
INPUT/OUTPUT with selectable pull up resistor. General purpose memory
mapped I/O port bit. Can be switched to ADPCM/CODEC testpoints.
INPUT/OUTPUT with selectable pull up resistor. General purpose memory
mapped I/O port bit.Can be switched to ADPCM/CODEC testpoints.
INPUT/OUTPUT with selectable pull up resistor. General purpose memory
mapped I/O port bit. Can be switched to ADPCM/CODEC testpoints.
INPUT/OUTPUT with selectable pull down resistor. General purpose memory
mapped I/O port bit. Can be switched to ADPCM/CODEC testpoints.
INPUT/OUTPUT with selectable pull down resistor. General purpose memory
mapped I/O port bit. Can be switched to ADPCM/CODEC testpoints.
INPUT/OUTPUT with selectable pull up resistor. General purpose memory
mapped I/O port bit. Can be switched to ADPCM/CODEC testpoints.
INPUT/OUTPUT with selectable pull up resistor and 12 mA drive current. General
purpose memory mapped I/O port bit. Can be programmed to generate an internal
interrupt.
INPUT/OUTPUT with selectable pull up resistor and 12 mA drive current. General
purpose memory mapped I/O port bit. Can be programmed to generate an internal
interrupt.
INPUT/OUTPUT with selectable pull up resistor and 12 mA drive current. General
purpose memory mapped I/O port bit. Can be programmed to generate an internal
interrupt.
INPUT/OUTPUT with selectable pull up resistor and 12 mA drive current. General
purpose memory mapped I/O port bit. Can be programmed to generate an internal
interrupt.
INPUT/OUTPUT with selectable pull up resistor and 12 mA drive current. General
purpose memory mapped I/O port bit. Can be programmed to generate an internal
interrupt.
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