pef82902 Infineon Technologies Corporation, pef82902 Datasheet - Page 120
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pef82902
Manufacturer Part Number
pef82902
Description
4b3t Second Generation Modular Isdn Nt Intelligent Extended
Manufacturer
Infineon Technologies Corporation
Datasheet
1.PEF82902.pdf
(243 pages)
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The XFIFO requests service from the microcontroller by setting a bit in the ISTAH
register, which causes an interrupt (XPR, XDU, XMR). The microcontroller can then read
the status register STAR (XFW, XDOV), write data in the FIFO and it may optionally
change the transmit FIFO block size (EXMR.XFBS) if required.
The instant of the initiation of a transmit pool ready (XPR) interrupt after different transmit
control commands is listed in
•
Table 27
When setting XME the transmitter appends the FCS and the endflag at the end of the
frame. When XTF & XME have been set, the XFIFO is locked until successful
transmission of the current frame, so a consecutive XPR interrupt also indicates
successful transmission of the frame, whereas after XME the XPR interrupt is asserted
as soon as there is space for one data block in the XFIFO.
The transfer block size is 32 bytes by default, but sometimes, if the microcontroller has
a high computational load, it is useful to increase the maximum reaction time for a XPR
interrupt. The maximum reaction time is:
t
With a selected block size of 16 bytes indicates a XPR interrupt when there are still 48
bytes (64 bytes - 16 bytes) to be transmitted. With a 32 bytes block size the XPR is
initiated when there are still 32 bytes (64 bytes - 32 bytes), i.d. the maximum reaction
time for the smaller block size is 50 % higher with the trade-off of a doubled interrupt
load. A selected block size of 32 or 16 bytes respectively always indicates the available
space in the XFIFO. So any number of bytes smaller than the selected XFBS may be
stored in the FIFO during one “write block“ access cycle.
Similar to RFBS for the receive FIFO, a new setting of XFBS takes effect after the next
XTF,XME or XRES command. XRES resets the XFIFO.
The XFIFO can hold any number of frames fitting in the 64 bytes.
Data Sheet
max
CMDR.
XTF
XTF &
XME
XME
= (XFIFO size - XFBS) / data transmission rate
Transmit pool ready (XPR) interrupt initiated...
as soon as the selected buffer size in the FIFO is available
after the successful transmission of the closing flag. The transmitter
always sends an abort sequence
as soon as the selected buffer size in the FIFO is available, two
consecutive frames share flags (endflag = startflag of next frame).
XPR Interrupt (availability of the XFIFO) after XTF, XME Commands
Table
27.
106
Functional Description
PEF 81902
2001-11-12
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