lm4869mh National Semiconductor Corporation, lm4869mh Datasheet - Page 17

• Manufacturer Part Number: lm4869mh
• Description: 1.9w Differential Input, Btl Output Stereo Audio Amplifier With Selectable Gain And Shutdown
• Manufacturer: National Semiconductor Corporation

Application Information
In order eliminate ’clicks and pops’, all capacitors must be
discharged before turn-on. Rapidly switching V
allow the capacitors to fully discharge, which may cause
’clicks and pops’.
AUDIO POWER AMPLIFIER DESIGN
Audio Amplifier Design: Driving 1W into an 8Ω Load
The following are the desired operational parameters:
The design begins by specifying the minimum supply voltage
necessary to obtain the desired output power. One way to
find the minimum supply voltage is to use the Output Power
vs Supply Voltage curve in the Typical Performance Char-
acteristics section. Another way, using Equation (6), is to
calculate the peak output voltage necessary to achieve the
desired output power for a given load impedance. To ac-
count for the amplifier’s dropout voltage, two additional volt-
ages, based on the Dropout Voltage vs Supply Voltage in the
Typical Performance Characteristics curves, must be
added to the result obtained by Equation (6). The result is
Equation (7).
The Output Power vs Supply Voltage graph for an 8Ω load
indicates a minimum supply voltage of 4.6V. This is easily
met by the commonly used 5V supply voltage. The additional
voltage creates the benefit of headroom, allowing the
LM4869 to produce peak output power in excess of 1W
without clipping or other audible distortion. The choice of
supply voltage must also not create a situation that violates
of maximum power dissipation as explained above in the
Power Dissipation section.
Power Output:
Load Impedance:
Input Level:
Input Impedance:
Bandwidth:
C
0.01µF
0.22µF
0.47µF
0.1µF
1.0µF
B
V
DD
≥ (V
OUTPEAK
C
i
120ms
140ms
170ms
240ms
110ms
= 0.47µF
+ (V
100 Hz−20 kHz
OD TOP
Ton
+ V
(Continued)
OD BOT
C
i
100ms
140ms
210ms
= 0.33µF
80ms
90ms
))
DD
±
1 W
0.25 dB
may not
1 V
20 kΩ
RMS
RMS
8Ω
(6)
(7)
17
After satisfying the LM4869’s power dissipation require-
ments, the minimum differential gain is found using Equation
(8).
Thus, a minimum gain of 2.83 allows the LM4869’s to reach
full output swing and maintain low noise and THD+N perfor-
mance. For this example, let A
the gain will be set to 10dB (A
low to GAIN 0 and a logic high to GAIN 1.
The last step in this design example is setting the amplifier’s
-3dB frequency bandwidth. To achieve the desired
pass band magnitude variation limit, the low frequency re-
sponse must extend to at least one-fifth the lower bandwidth
limit and the high frequency response must extend to at least
five times the upper bandwidth limit. This extended bandwith
produces a gain variation of -0.17dB at the bandwith’s limits,
well within the
As mentioned in the External Components section, the inter-
nal input resistor and C
amplifier’s lower bandpass frequency limit. Find the coupling
capacitor’s value using Equation (11).
The result is (using the minimum R
correct magnitude response at 20Hz)
Use a 0.39µF capacitor, the closest standard value. The
product of the desired high frequency cutoff (100kHz in this
example) and the differential gain, A
per passband response limit. With A
100kHz, the closed-loop gain bandwidth product (GBWP) is
320kHz. This is less than the LM4869’s 3.5MHz GBWP. With
this margin, the amplifier can be used in designs that require
more differential gain while avoiding performance-restricting
bandwidth limitations.
and an
1/(2π
±
0.25dB desired limit. The results are an
f
H
f
f
= 20kHz x 5 = 100kHz
L
*
-3dB
20kΩ
= 100Hz/5 = 20Hz
i
create a high pass filter that sets the
= 1/2π(20kΩ)C
*
20Hz) = 0.398µF
VD
VD
= 3. In the example design,
= 3.2) by applying a logic
IN
resistor value to ensure
VD
, determines the up-
VD
I
= 3.2 and f
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±
0.25dB
(10)
(12)
H
(11)
(8)
(9)
=