ada4930-1 Analog Devices, Inc., ada4930-1 Datasheet - Page 21
![no-image](/images/no-image-200.jpg)
ada4930-1
Manufacturer Part Number
ada4930-1
Description
Ultralow Noise Drivers For Low Voltage Adcs Ada4930-1/ada4930-2
Manufacturer
Analog Devices, Inc.
Datasheet
1.ADA4930-1.pdf
(28 pages)
Terminating a Single-Ended Input in a Single-Supply
Applications
When the application circuit of Figure 50 is powered by a single
supply, the common-mode voltage at the amplifier inputs, V
and V
common-mode range. Two methods are available: a dc bias on
the source, as shown in Figure 51, or by connecting resistors R
between each input and the supply, as shown on Figure 54.
Input Common-Mode Adjustment with DC Biased Source
To drive a 1.8 V ADC with V
minimizes the power dissipation of the ADA4930-1/ADA4930-2.
The application circuit of Figure 50 on a 3.3 V single supply with a
dc bias added to the source is shown in Figure 51.
To determine the minimum required dc bias, the following steps
must be taken:
1.
2. Write a nodal equation for V
Figure 51. Single-Supply, Terminated Single-Ended-to-Differential System with G = 1
1.124V p-p
2V p-p
Figure 52. Thevenin Equivalent of Single-Supply Application Circuit
Convert the terminated inputs to their Thevenin equivalents,
as shown in the Figure 52 circuit.
Recognize that while the ADA4930-1/ADA4930-2 is in its
linear operating region, V
both equations in Step 2 give equal results.
V
V
V
V
N
S
TH
V
, may have to be raised to comply with the specified input
P
N
V
DC-TH
DC
=
=
50Ω
R
V
V
S
28.11Ω
50Ω
TH
DC
R
TH
−
+
TH
V
64.2Ω
64.2Ω
28.11Ω
DC
+
R
R
TH
301
−
T
TH
142Ω
V
142Ω
R
R
+
+
OCM
142Ω
142Ω
G1
G2
V
R
R
142
OCM
G1
G2
301
301
CM
+
P
V
V
+
= 1 V, a 3.3 V single supply
P
N
V
V
and V
28.11
P
142
P
N
301
or V
301Ω
301Ω
ADA4930
R
R
301Ω
301Ω
ADA4930
F1
F2
R
R
+
3.3V
F1
F2
3.3V
V
N
N
28.11
.
OP
are equal. Therefore,
(
V
VON
VOP
ON
−
R
L
R
V
L
V
1.990V p-p
TH
OUT, dm
V
1.99V p-p
OUT, dm
−
V
DC
P
Rev. A | Page 21 of 28
CM
−
TH
)
3.
4.
5.
2V p-p
To comply with the minimum specified input common-mode
voltage of 0.3 V at V
and V
Recognize that V
V
maximum).
Let
V
V
Substitute conditions into the nodal equation for V
for V
0.3 = −1.124/2 + V
0.3 + 0.562 − 0.361 − 0.18 − 0.203 = 0.639 V
V
Or
Substitute conditions into the nodal equation for V
solve for V
0.3 = V
0.3 – 0.361 + 0.18 = 0.639 × V
V
Converting V
The final application circuit is shown in Figure 53. The
additional dc bias of 0.33 V at the inputs ensures that the
minimum input common-mode requirements are met when
the source signal is bipolar with a 2 V p-p amplitude and
V
V
Figure 53. Single-Supply Application Circuit with DC Source Bias
V
OP
P min
ON max
DC-TH
DC-TH
OCM
0.33V
DC
S
V
and V
DC
DC-TH
=
is at 1 V.
= V
N
50Ω
= 0.186 V
= 0.186 V
= V
R
50Ω
DC-TH
R
to 0.3 V.
S
S
.
N min
S
R
OCM
+
DC-TH
are at their minimum (and therefore V
TH
64.2Ω
64.2Ω
+ 0.361 × (1 − 1.99/4 − V
R
DC-TH
= 0.3 V, V
TH
+ V
R
.
T
P
DC-TH
×
from its Thevenin equivalent results in
and V
OUT, dm
0.186 =
142Ω
V
142Ω
S
R
R
OCM
G1
G2
= 3.3 V, set the minimum value of V
+ 0.361 × (1 + 1.99/4 = 1.124/2 – V
ADA4930-1/ADA4930-2
/4 and V
N
OCM
are at their minimum values when
V
V
P
N
0.33
= V
301Ω
301Ω
ADA4930
DC-TH
R
R
F1
F2
OP min
V
3.3V
CM
= 1 V, V
= V
DC-TH
OCM
)
TH min
− V
DC-TH
R
L
OUT, dm
ON
= −V
V
1.990V p-p
P
OUT, dm
and solve
is at its
N
/4
and
TH
DC-TH
/2
P
)