tda6503a NXP Semiconductors, tda6503a Datasheet - Page 11

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tda6503a

Manufacturer Part Number
tda6503a
Description
5 V Mixers/oscillators And Synthesizers For Cable Tv And Vcr 2-band Tuners
Manufacturer
NXP Semiconductors
Datasheet

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Table 8 Reference divider ratio select bits
8.2.3
The read mode is defined by the address byte ADB with bit R/W = 1 (see Table 9).
After the slave address has been recognized, the device generates an acknowledge pulse and status byte SB is
transferred on the SDA line (MSB first). Data is valid on the SDA line during a HIGH level of the SCL line. A second data
byte can be read from the device if the microcontroller generates an acknowledge on the SDA line (master acknowledge).
End of transmission will occur if no master acknowledge occurs. The device will then release the data line to allow the
microcontroller to generate a STOP condition.
Bit POR is set to logic 1 at power-on. The bit is reset when an end-of-data is detected by the device (end of a read
sequence). Control of the loop is made possible with bit FL which indicates when the loop is locked (bit FL = 1)
A built-in ADC input is available on pin LOCK/ADC (I
information to the microcontroller of the IF section of the television.
Table 9 Read data format
Note
1. MSB is transmitted first.
Table 10 Description of the bits used in Table 9
2001 Aug 22
Address byte
Status byte
MA1 and MA0
R/W
POR
FL
R
A2, A1 and A0
RSA
5 V mixers/oscillators and synthesizers for
cable TV and VCR 2-band tuners
X
0
1
NAME
BIT
R
EAD MODE
RSB
0
1
1
programmable address bits (see Table 6)
logic 1 for read mode
Power-on reset flag:
in-lock flag:
ready flag:
digital output of the 5-level ADC (see Table 11)
BYTE
logic 0: after an end-of-data detected by the device
logic 1: at power-on
logic 0: loop is not locked
logic 1: loop is locked
logic 0: mode after Power-on reset (bit T2 = 0, bit T1 = 0 and bit T0 = 1) and the PLL is locked
logic 1: in other conditions
ADB
SB
REFERENCE DIVIDER RATIO
MSB
POR
1
(1)
128
80
64
FL
1
2
C-bus mode only). This converter can be used to apply AFC
R
0
11
DESCRIPTION
0
1
BIT
0
1
FREQUENCY STEP (kHz)
TDA6502; TDA6502A;
TDA6503; TDA6503A
MA1
A2
31.25
62.5
50
Product specification
MA0
A1
R/W = 1
LSB
A0

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