el5220t Intersil Corporation, el5220t Datasheet
![no-image](/images/manufacturer_photos/0/3/342/intersil_corporation_sml.jpg)
el5220t
Related parts for el5220t
el5220t Summary of contents
Page 1
... Other applications include battery power and portable devices, especially where low power consumption is important. The EL5220T is available MSOP package, and a thermally enhanced 8 Ld DFN package. Both feature a standard operational amplifier pinout. The devices operate over an ambient temperature range of -40°C to +85° ...
Page 2
... SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 3. For Moisture Sensitivity Level (MSL), please see device information page for EL5220T. For more information on MSL please see techbrief TB363. ...
Page 3
... Output Current OUT POWER SUPPLY PERFORMANCE ( Supply Voltage Range Supply Current (Per Amplifier) S PSRR Power Supply Rejection Ratio 3 EL5220T Thermal Information (T = +25° .+19.8V Thermal Resistance (Typical 0.5V 0. MSOP (Notes DFN (Notes ...
Page 4
... S PSRR Power Supply Rejection Ratio DYNAMIC PERFORMANCE SR Slew Rate (Note 9) t Settling to +0.1% (Note 10 -3dB Bandwidth GBWP Gain-Bandwidth Product PM Phase Margin CS Channel Separation 4 EL5220T + = +5V -5V 10kΩ CONDITIONS -4.0V ≤ V OUTx OUTx R = 10kΩ 10kΩ, C ...
Page 5
... Settling time measured as the time from when the output level crosses the final value on rising/falling edge to when the output level settles within a ±0.1% error band. The range of the error band is determined by: Final Value(V) ± [Full Scale(V) * 0.1%] 5 EL5220T + = +18V 0V 10kΩ to 9V, T ...
Page 6
... INPUT OFFSET VOLTAGE DRIFT (mV) FIGURE 5. INPUT OFFSET VOLTAGE DRIFT (DFN ± - TEMPERATURE (°C) FIGURE 7. INPUT BIAS CURRENT vs TEMPERATURE 6 EL5220T 18 TYPICAL 16 PRODUCTION DISTRIBUTION FIGURE 4. INPUT OFFSET VOLTAGE DRIFT (MSOP) 10 ...
Page 7
... FIGURE 11. SLEW RATE vs TEMPERATURE 800 T = +25° LOAD INPUT AT GND 700 600 500 400 SUPPLY VOLTAGE (±V) FIGURE 13. SUPPLY CURRENT PER AMPLIFIER vs SUPPLY VOLTAGE 7 EL5220T (Continued) 140 120 100 100 150 -50 FIGURE 10. OPEN-LOOP GAIN vs TEMPERATURE 590 V = ± ±5V S ...
Page 8
... V = ± +25° 10kΩ 8pF L 0 10k 100k FREQUENCY (Hz) FIGURE 19. MAXIMUM OUTPUT SWING vs FREQUENCY 8 EL5220T (Continued) 250 5 200 0 150 100 - -50 -15 1M 10M 100M 100k FIGURE 16. FREQUENCY RESPONSE FOR VARIOUS R ...
Page 9
... FREQUENCY (Hz) FIGURE 23. TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY 100 100 LOAD CAPACITANCE (pF) FIGURE 25. SMALL SIGNAL OVERSHOOT vs LOAD CAPACITANCE 9 EL5220T (Continued) 1000 100 10M 100 FIGURE 22. INPUT VOLTAGE NOISE SPECTRAL - ± 10kΩ ...
Page 10
... FIGURE 27. LARGE SIGNAL TRANSIENT RESPONSE VOUTA VINA+ 49.9 10 EL5220T (Continued ± +25° 10kΩ 8pF L 100mV STEP FIGURE 28. SMALL SIGNAL TRANSIENT RESPONSE EL5220T (8LD MSOP/DFN SHOWN VOUTA VINA- VOUTB VINA+ VINB ...
Page 11
... Operating Voltage, Input and Output Capability The EL5220T can operate on a single supply or dual supply configuration. The EL5220T operating voltage ranges from a minimum of 4. maximum of 19V. This range allows for a standard 5V (or ±2.5V) supply voltage to dip to -10 standard 18V (or ± ...
Page 12
... EL5220T. A snubber is a shunt load consisting of a resistor in series with a capacitor. An optimized snubber can improve the phase margin and the stability of the EL5220T. The advantage of a snubber circuit is that it does not draw any DC load current or reduce the gain. ...
Page 13
... Power Supply Bypassing and Printed Circuit Board Layout The EL5220T can provide gain at high frequency, so good printed circuit board layout is necessary for optimum performance. Ground plane construction is highly recommended, trace lengths should be as short as possible and the power supply pins must be well bypassed to reduce any risk of oscillation ...
Page 14
... LEAD MINI SMALL OUTLINE PLASTIC PACKAGE (MSOP) Rev 0, 9/09 3.0±0.1 8 PIN 0.65 BSC TOP VIEW H 0.33 +0.07/ -0.08 0. SIDE VIEW 1 5.80 4.40 3.00 0.65 TYPICAL RECOMMENDED LAND PATTERN 14 EL5220T A 0. 4.9±0.15 3.0±0.1 1.10 Max B 0.86±0.09 C SEATING PLANE 0.10 ± 0.05 0.10 C NOTES: 1. Dimensions are in millimeters. 2. Dimensioning and tolerancing conform to JEDEC MO-187-AA and AMSE Y14.5m-1994. 3. ...
Page 15
... Package Outline Drawing L8.2x3 8 LEAD DUAL FLAT NO-LEAD PLASTIC PACKAGE Rev 1, 3/10 2.00 (4X) 0.15 TOP VIEW (1.65) (1.50) (1.80) (2.80) (6X 0.50) TYPICAL RECOMMENDED LAND PATTERN 15 EL5220T A PIN 1 INDEX AREA B 6 PIN #1 INDEX AREA 8X 0.40 ±0.10 0.90 ±0.10 (8X 0.60) 0.05 MAX (8X 0.25) NOTES: 1. Dimensions are in millimeters. Dimensions Dimensioning and tolerancing conform to ASME Y14.5m-1994. ...