clc426 National Semiconductor Corporation, clc426 Datasheet - Page 6

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clc426

Manufacturer Part Number
clc426
Description
Wideband, Low-noise, Voltage Feedback Op Amp
Manufacturer
National Semiconductor Corporation
Datasheet

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Single-Supply Operation
The CLC426 can be operated with single power supply as
shown in fig. 7. Both the input and output are capacitively
coupled to set the dc operating point.
DAC Output Buffer
The CLC426's quick settling, wide bandwidth and low
differential input capacitance combine to form an excel-
lent I-to-V converter for current-output DACs in such
applications as reconstruction video. The circuit of fig. 8
implements a low-noise transimpedance amplifier com-
monly used to buffer high-speed current output devices.
The transimpedance gain is set by R
capacitor, C
inductive behavior of the closed-loop frequency response
of this type of circuit. Equation 3 shows a means of
calculating the value of C
a maximally-flat signal frequency response with approxi-
mately 65° phase margin and 5% step-response over-
shoot. Notice that C
capacitance and the differential input capacitance of the
CLC426 which is located in its Electrical Characteristics
Table. Notice also that CLC426's gain-bandwidth product
(GBW) is also located in the same table. Equation 5
provides the resulting signal bandwidth.
http://www.national.com
C
C
f
t
f
, is needed in order to compensate for the
2
C
out
2
R GBW
C
C
f
t
in dif
t
is the sum of the DAC output
f
Fig. 7
Fig. 8
which will provide conditions for
f
. A feedback
Eq. 3
Eq. 4
6
Sallen-Key Active Filters
The CLC426 is well suited for Sallen-Key type of active
filters. Fig. 9 shows the 2
filter topology and design equations.
To design the band-pass, begin by choosing values for R
and R
sonable values for C
compute R
optimum high-frequency performance it is recommended
that the resistor values fall in the range of 10 to 1k and
the capacitors be kept above 10pF. The design can
be further improved by compensating for the delay through
the op amp. For further details on this technique, please
request Application Note OA-21 from National Semicon-
ductor Corporation.
Printed Circuit Board Layout
Generally, a good high-frequency layout will keep power
supply and ground traces away from the inverting input
and output pins. Parasitic capacitances on these nodes
to ground will cause frequency-response peaking and
possible circuit oscillation, see OA-15 for more information.
National suggests the CLC730013 (through-hole) or the
CLC730027 (SOIC) evaluation board as a guide for high-
frequency layout and as an aid in device testing and
characterization.
R
R
R
C
G
1
2
2
3
1
g
2
, for example R
GR
5
5
1
signal bandwidth
GC
GR
C
R
R
1
1
g
f
1
1
1
Q
,
. R
2
desired mid band gain
1 4 8
4 8
1 4 8
.
2
f
Q
,
and R
.
2
where f
.
Q
1
Q
and C
2
f
2
4
2
G G
Q
3
Fig. 9
nd
R
2
2
can then be computed. For
G G
2
order Sallen-Key band-pass
g
2 2
1
2
G G
desired center frequency
(where C
2
200 . Then choose rea-
GBW
2
R C
2
f
1
G
t
1
=5C
1
2
) and then
Eq. 5
f

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