z89176 ZiLOG Semiconductor, z89176 Datasheet - Page 51
z89176
Manufacturer Part Number
z89176
Description
Voice Processing Controllers
Manufacturer
ZiLOG Semiconductor
Datasheet
1.Z89176.pdf
(68 pages)
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Zilog
DSP Analog Data Registers
The D/A conversion is DSP driven by sending 10-bit data
to the EXT5 of the DSP. The six remaining bits of EXT5 are
not used (Figure 36).
Analog Control Register (ACR)
The Analog Control register is mapped to register EXT6 of
the DSP (Table 17). This read/write register is accessible
by the DSP only.
MPX_DSP_INT0
Reserved
Reserved
D/A_SamplingRate-------8--------
DS97TAD0100
Field
F
E
F
f---------------
-edcba----------
------9---------
D
E
C
Position
D
B
C
Table 17. EXT6 Analog Control Register (ACR)
A
B
Figure 35. EXT5 Register D/A Mode Definition
Figure 36. EXT5 Register A/D Mode Definition
9
A
8
9
Attrib
7
R/W
R/W
8
W
W
R
R
P R E L I M I N A R Y
6
7
5
6
4
Value
5
1
0
0
1
A/D supplies 8-bit data to the DSP through the register
EXT5 of the DSP. From the 16 bits of EXT5, only bits 2
through 9 are used by the A/D (Figure 37). Bits 0 and 1 are
padded with zeroes.
The 16-bit field of EXT6 defines modes of both the A/D and
the D/A. The High Byte configures the D/A while the Low
Byte controls the A/D mode.
3
4
2
3
P26
Timer3
Return “0”
No effect
Return “1”
No effect
1
2
0
Label
1
0
Reserved
8-Bit Data From A/D Converter
Reserved
(Read Only)
Reserved
10-Bit Data for D/A
Reserved
Voice Processing Controllers
(Write Only)
16 kHz
10 kHz
20.48
MHz
Z89175/Z89176
8.04 kHz
9.6 kHz
29.49
MHz*
51
2
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