adcmp572 Analog Devices, Inc., adcmp572 Datasheet - Page 11

• Manufacturer Part Number: adcmp572
• Description: Ultrafast 3.3 V/5 V Single-supply Comparators
• Manufacturer: Analog Devices, Inc.

COMPARATOR HYSTERESIS
The addition of hysteresis to a comparator is often desirable in a
noisy environment or when the differential input amplitudes are
relatively small or slow moving, but excessive hysteresis has a
cost in degraded accuracy and slew-induced timing shifts. The
transfer function for a comparator with hysteresis is shown in
Figure 19. If the input voltage approaches the threshold (0.0 V
in this example) from the negative direction, the comparator
switches from low to high when the input crosses +VH/2. The
new switching threshold becomes −V
remains in the high state until the threshold −V
from the positive direction. In this manner, noise centered on
0.0 V input does not cause the comparator to switch states
unless it exceeds the region bounded by ±V
The customary technique for introducing hysteresis into a
comparator uses positive feedback from the output back to the
input. A limitation of this approach is that the amount of
hysteresis varies with the output logic levels, resulting in
hysteresis that can be load dependent and is not symmetrical
about the threshold. The external feedback network can also
introduce significant parasitics, which reduce high speed
performance and can even induce oscillation in some cases.
The ADCMP572/ADCMP573 comparators offer a program-
mable hysteresis feature that can significantly improve the
accuracy and stability of the desired hysteresis. By connecting
an external pull-down resistor from the HYS pin to GND, a
variable amount of hysteresis can be applied. Leaving the HYS
pin disconnected disables the feature, and hysteresis is then less
than 1 mV as specified. The maximum hysteresis that can be
applied using this method is approximately ±25 mV with the
pin grounded. Figure 20 illustrates the amount of hysteresis
Figure 19. Comparator Hysteresis Transfer Function
–V
2
H
OUTPUT
V
OL
0
V
OH
H
/2. The comparator
+V
2
H
INPUT
H
/2.
H
/2 is crossed
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applied as a function of external resistor value. The advantages
of applying hysteresis in this manner are improved accuracy,
stability, and reduced component count. An external bypass
capacitor is not recommended on the HYS pin because it would
likely degrade the jitter performance of the device. The
hysteresis pin could also be driven by a CMOS DAC. It is biased
to approximately 250 mV and has an internal series resistance
of 600 Ω.
MINIMUM INPUT SLEW RATE REQUIREMENTS
As with all high speed comparators, a minimum slew rate
requirement must be met to ensure that the device does not
oscillate as the input signal crosses the threshold. This
oscillation is due in part to the high input bandwidth of the
comparator and the feedback parasitics inherent in the package.
A minimum slew rate of 50 V/µs should ensure clean output
transitions from the ADCMP572/ ADCMP573 comparators.
The slew rate may be too slow for other reasons. The extremely
high bandwidth of these devices means that broadband noise
can be a significant factor when input slew rates are low. There
will be at least 120 µv of thermal noise generated over the full
comparator bandwidth by two 50 Ω terminations at room
temperature. With a slew rate of only 50 V/µs the input will be
inside this noise band for over 2 ps, rendering the comparator’s
jitter performance of 200 fs moot. Raising the slew rate of the
input signal and/or reducing the bandwidth over which this
resistance is seen at the input can greatly reduce jitter.
60
50
40
30
20
10
0
0
Figure 20. Hysteresis vs. R
1
2
ADCMP572/ADCMP573
R
HYS
3
(k Ω )
HYS
Control Resistor
4
5
6