lm21215mhx National Semiconductor Corporation, lm21215mhx Datasheet - Page 18
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lm21215mhx
Manufacturer Part Number
lm21215mhx
Description
15a High Efficiency Synchronous Buck Regulator
Manufacturer
National Semiconductor Corporation
Datasheet
1.LM21215MHX.pdf
(24 pages)
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the open-loop gain is a magnitude of 1. It is recommended
that the f
quency. The output capacitance, C
chemistry and bias voltage. For Multi-Layer Ceramic Capac-
itors (MLCC), the total capacitance will degrade as the DC
bias voltage is increased. Measuring the actual capacitance
value for the output capacitors at the output voltage is rec-
ommended to accurately calculate the compensation net-
work. The example given here is the total output capacitance
using the three MLCC output capacitors biased at 1.2V, as
seen in the typical application schematic,
it is more conservative, from a stability standpoint, to err on
the side of a smaller output capacitance value in the com-
pensation calculations rather than a larger, as this will result
in a lower bandwidth but increased phase margin.
First, a the value of R
10 kΩ. From this, the value of R
the mid-band gain so that the desired crossover frequency is
achieved:
Next, the value of C
half of the LC double pole frequency (f
Now the value of C
of the switching frequency (f
R
double pole frequency:
Last, C
quency as the zero created by the output capacitor ESR:
An illustration of the total loop response can be seen in
11.
C2
can then be calculated to set the second zero at the LC
C3
CROSSOVER
can be calculated to place a pole at the same fre-
C2
C1
not exceed one-fifth of the switching fre-
FB1
can be calculated to place a pole at half
can be calculated by placing a zero at
should be chosen. A typical value is
SW
):
C1
O
can be calculated to set
, depends on capacitor
LC
):
Figure
15. Note that
Figure
18
It is important to verify the stability by either observing the load
transient response or by using a network analyzer. A phase
margin between 45° and 70° is usually desired for voltage
mode systems. Excessive phase margin can cause slow sys-
tem response to load transients and low phase margin may
cause an oscillatory load transient response. If the load step
response peak deviation is larger than desired, increasing
f
may help but usually at the expense of phase margin.
THERMAL CONSIDERATIONS
The thermal characteristics of the LM21215 are specified us-
ing the parameter θ
to the ambient temperature. Although the value of θ
pendant on many variables, it still can be used to approximate
the operating junction temperature of the device.
To obtain an estimate of the device junction temperature, one
may use the following relationship:
and
Where:
T
Watts (P
resistance for the LM21215, T
°C, and I
It is important to always keep the operating junction temper-
ature (T
temperature exceeds 165°C the device will cycle in and out
of thermal shutdown. If thermal shutdown occurs it is a sign
of inadequate heatsinking or excessive power dissipation in
the device.
Figure
the θ
test consisted of 4 layers: 1oz. copper was used for the inter-
nal layers while the external layers were plated to 2oz. copper
weight. To provide an optimal thermal connection, a 3 x 5 ar-
ray of 8 mil. vias under the thermal pad were used, and an
CROSSOVER
J
is the junction temperature in °C, P
JA
12, shown below, provides a better approximation of
for a given PCB copper area. The PCB used in this
J
IN
OUT
) below 125°C for reliable operation. If the junction
= V
200
150
100
-50
and recalculating the compensation components
50
is the output load current.
0
10
IN
FIGURE 11. Loop Response
x I
IN
JA
100
), θ
GAIN
PHASE
, which relates the junction temperature
FREQUENCY (Hz)
JA
is the junction to ambient thermal
1k
A
is the ambient temperature in
10k
IN
is the input power in
100k
1M
160
140
120
100
-20
-40
80
60
40
20
JA
0
30103739
is de-