74act2708 Fairchild Semiconductor, 74act2708 Datasheet

74act2708

Manufacturer Part Number

74act2708

Description

64 X 9 First-in, First-out Memory

Manufacturer

Fairchild Semiconductor

Datasheet

1.74ACT2708.pdf (13 pages)

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Bonase Electronics (HK) Co., Limited

Part Number:

74act2708PC

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74ACT2708

64 x 9 First-In, First-Out Memory

General Description

The ACT2708 is an expandable first-in, first-out memory

organized as 64 words by 9 bits. An 85 MHz shift-in and 60

MHz shift-out typical data rate makes it ideal for high-speed

applications. It uses a dual port RAM architecture with

pointer logic to achieve the high speed with negligible fall-

through time.

Separate Shift-In (SI) and Shift-Out (SO) clocks control the

use of synchronous or asynchronous write or read. Other

controls include a Master Reset (MR) and Output Enable

(OE) for initializing the internal registers and allowing the

data outputs to be 3-STATE. Input Ready (IR) and Output

Ready (OR) signal when the FIFO is ready for I/O opera-

tions. The status flags HF and FULL indicate when the

FIFO is full, empty or half full.

The FIFO can be expanded to provide different word

lengths by tying off unused data inputs.

Ordering Code:

Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.

Connection Diagram

FACT

Order Number

74ACT2708PC

is a trademark of Fairchild Semiconductor Corporation.

Pin Assignment for DIP

Package Number

N28B

28-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.600” Wide

DS010144.prf

Features

Applications

• High-speed disk or tape controllers

• A/D output buffers

• High-speed graphics pixel buffer

• Video time base correction

• Digital filtering

Pin Descriptions

64-words by 9-bit dual port RAM organization

85 MHz shift-in, 60 MHz shift-out data rate, typical

Expandable in word width only

TTL-compatible inputs

Asynchronous or synchronous operation

Asynchronous master reset

Outputs source/sink 8 mA

3-STATE outputs

Full ESD protection

Input and output pins directly in line for easy board lay-

out

TRW 1030 work-alike operation

Package Description

FULL

Pin Names

–D

–O

Data Inputs

Master Reset

Output Enable Input

Shift-In

Shift-Out

Input Ready

Output Ready

Half Full Flag

Full Flag

Data Outputs

February 1989

Revised January 1999

Description

www.fairchildsemi.com

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