74act2708 Fairchild Semiconductor, 74act2708 Datasheet - Page 7

• Manufacturer Part Number: 74act2708
• Description: 64 X 9 First-in, First-out Memory
• Manufacturer: Fairchild Semiconductor

Mode 4: Shift-Out Sequence, FIFO Full to Empty
Sequence of Operation
1. FIFO is initially full and OR is HIGH, indicating valid
2. SO goes HIGH, resulting in OR going LOW one propa-
3. SO goes LOW, new data reaches output one propaga-
Note: SI and OE are LOW; MR is HIGH; D
data is at the output. IR is LOW.
gation delay, t
output stage is busy.
tion delay, t
gation delay, t
D
, after SO falls; OR goes HIGH one propa-
OR
OR
, after SO rises. OR LOW indicates
, after SO falls and HF rises one
0
–D
8
are immaterial.
FIGURE 4. Modes of Operation Mode 4
7
4. Repeat process through the 64th SO pulse. FULL flag
propagation delay, t
through time, t
goes LOW one propagation delay, t
edge of 33rd SO, indicating that the FIFO is less than
half full. On the falling edge of the 64th SO, HF goes
LOW one propagation delay, t
the FIFO is empty. The SO pulse may rise and fall
again with an attempt to unload an empty FIFO. This
results in no change in the data on the outputs as the
64th word stays latched.
FT
, after SO falls.
OF
, after SO falls. IR rises one fall-
OE
, after SO, indicating
OHF
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, after the rising