tda4856-v6 NXP Semiconductors, tda4856-v6 Datasheet - Page 41
tda4856-v6
Manufacturer Part Number
tda4856-v6
Description
I2c-bus Autosync Deflection Controller For Pc Monitors
Manufacturer
NXP Semiconductors
Datasheet
1.TDA4856-V6.pdf
(58 pages)
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Philips Semiconductors
PLL2 soft start and soft down sequences
2003 Sep 30
handbook, full pagewidth
handbook, full pagewidth
I
PC monitors
(1) Pins HDRV and BDRV are floating for V
2
C-bus autosync deflection controller for
V HPLL2
V HPLL2
Fig.23 Activation of PLL2 soft start and soft down sequences via the I
b. PLL2 soft down sequence for V
CC
a. PLL2 soft start sequence for V
1.8 V
4.6 V
< 8.6 V.
HDRV duty cycle begins to increase
continuous blanking activated on pins CLBL and HUNLOCK
PLL2 disabled
frequency detector disabled
HDRV/HFLB protection disabled
4.0 V
3.2 V
BDRV duty cycle begins to decrease
BDRV duty cycle begins to increase
HDRV duty cycle has reached nominal value
4.0 V
2.8 V
41
BDRV duty cycle has reached nominal value
BDRV floating
HDRV duty cycle begins to decrease
4.6 V
1.8 V
CC
continuous blanking off
PLL2 enabled
frequency detector enabled
HDRV/HFLB protection enabled
CC
HDRV floating
> 8.6 V.
> 8.6 V.
(1)
time
time
2
(1)
C-bus.
MGS279
MGS280
Product specification
TDA4856
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