m35080-mn6t STMicroelectronics, m35080-mn6t Datasheet - Page 11

• Manufacturer Part Number: m35080-mn6t
• Description: 8 Kbit Serial Spi Bus Eeprom With Incremental Registers
• Manufacturer: STMicroelectronics

Figure 12. Page Write Operation Sequence
Note: 1. The most significant address bits, A15-A10, are treated as Don’t Care.
POWER ON STATE
After power-on, the memory device is in the follow-
ing state:
– low power stand-by state
– deselected (after power-on, a high-to-low transi-
– the WEL bit is reset
– the SRWD, BP1 and BP0 bits of the status reg-
tion is required on the S input before any opera-
tions can be started).
ister are unchanged from the previous power-
down (they are non-volatile bits).
2. The number of clock pulses must be a multiple of 8. Otherwise, the write is aborted.
S
C
D
S
C
D
7
32
0
6
33
1
DATA BYTE 2
5
34
INSTRUCTION
2
4
35 36 37 38 39 40 41 42
3
3
4
2
5
1
6
0
7
7
15
8
6
14 13
9 10
16 BIT ADDRESS
DATA BYTE 3
5
4
43
Table 8. Initial Status Register Format
INITIAL DELIVERY STATE
The device is delivered with the memory array in a
fully erased state. With the exception of the first 32
bytes, all data bits are set to ‘1’, and hence all data
bytes are at FFh. The first 32 bytes are set to all
‘0’s, and hence the first 16 words at 0000h.
The status register bits are initialized to ‘0’, except
for bit b4, which is set to ‘1’, as shown in Table 8.
3
44 45 46 47
3
20 21 22 23 24 25 26 27
b7
2
0
2
1
1
0
0
0
7
6
0
6
DATA BYTE N
5
DATA BYTE 1
5
4
1
4
3
3
28 29 30
2
0
2
1
1
0
0
0
31
AI01796
0
M35080
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b0
0