74lcx74 STMicroelectronics, 74lcx74 Datasheet

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74lcx74

Manufacturer Part Number
74lcx74
Description
Cmos Dual D-type Flip Flop With 5v Tolerant Input
Manufacturer
STMicroelectronics
Datasheet

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Order codes
Features
July 2006
5V tolerant inputs
High speed:
– f
Power down protection on inputs and outputs
Symmetrical output impedance:
– |I
PCI bus levels guaranteed at 24mA
Balanced propagation delays:
– t
Operating voltage range:
– V
Pin and function compatible with
74 series 74
Latch-up performance exceeds
500mA (JESD 17)
ESD performance:
– HBM > 2000V
(MIL STD 883 method 3015); MM > 200V
MAX
PLH
OH
CC
| = I
74LCX74MTR
74LCX74TTR
≅ t
(Opr) = 2.0V to 3.6V
Part number
= 150MHz (Max) at V
PHL
OL
= 24mA (Min) at V
CC
CC
= 3V
= 3V
Low voltage CMOS dual D-Type Flip Flop
TSSOP14
Package
SO-14
Rev 8
Description
The 74LCX74 is a low voltage CMOS dual D-type
flip flop with preset and clear non inverting
fabricated with sub-micron silicon gate and
double-layer metal wiring C
ideal for low power and high speed 3.3V
applications; it can be interfaced to 5V signal
environment for inputs.
A signal on the D INPUT is transferred to the Q
OUTPUT during the positive going transition of
the clock pulse.
CLR and PR are independent of the clock and
accomplished by a low setting on the appropriate
input.
It has same speed performance at 3.3V than 5V
AC/ACT family, combined with a lower power
consumption.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
SO-14
with 5V tolerant inputs
Tape and reel
Tape and reel
2
Packaging
MOS technology. It is
74LCX74
TSSOP14
www.st.com
1/17
17

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74lcx74 Summary of contents

Page 1

... Low voltage CMOS dual D-Type Flip Flop = Description The 74LCX74 is a low voltage CMOS dual D-type flip flop with preset and clear non inverting fabricated with sub-micron silicon gate and double-layer metal wiring C ideal for low power and high speed 3.3V applications; it can be interfaced to 5V signal environment for inputs ...

Page 2

... Contents Contents 1 Logic symbols and I/O equivalent circuit . . . . . . . . . . . . . . . . . . . . . . . . 3 1.1 Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Pin settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.3 Truth table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3.1 Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 4 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 5 Test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 6 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 7 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 8 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 2/17 74LCX74 ...

Page 3

... Logic symbols and I/O equivalent circuit Figure 1. IEC logic symbols Figure 2. Input and output equivalent circuit 1.1 Logic diagram Figure 3. Logic diagram Note: This logic diagram has not to be used to estimate propagation delays Logic symbols and I/O equivalent circuit 3/17 ...

Page 4

... Asynchronous set - direct input 1Q, 2Q True Flip-Flop outputs 1Q, 2Q Complement Flip-Flop outputs GND Ground (0V) V Positive supply voltage CC Inputs (1) X Name and function Outputs Function CLEAR H L PRESET change n n 74LCX74 ...

Page 5

... Maximum rating stressing the device above the rating listed in the “absolute maximum ratings” table may cause permanent damage to the device. these are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied ...

Page 6

... O =100 µ = = =24 mA 0.55 O ± 5. 5. GND ± 3 0.6V 500 IH CC Value °C A Min Typ 0.8 = 50pF = 0V 3.3V IH -0.8 74LCX74 Unit µA µA µA µA Unit Max V ...

Page 7

... Table 7. AC electrical characteristics Symbol Parameter Propagation delay t t time ( PLH PHL Q) Propagation delay t t time (PR or CLR PLH PHL Setup time, HIGH t or LOW level Hold time, HIGH t or LOW level ...

Page 8

... Test circuit 5 Test circuit Figure 5. Test circuit C = 50pF or equivalent (includes jig and probe capacitance) L Ω 500 or equivalent pulse generator (typically 50 T OUT 6 Waveforms Figure 6. Propagation delays, setup and hold times (f = 1MHz; 50% duty cycle) 8/17 Ω ) 74LCX74 ...

Page 9

... Figure 7. Propagation delays (f=1MHz; 50% duty cycle) Figure 8. Recovery times (f=1MHz; 50% duty cycle) Waveforms 9/17 ...

Page 10

... Waveforms Figure 9. Pulse width (f=1MHz; 50% duty cycle) 10/17 74LCX74 ...

Page 11

... Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect . The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label ...

Page 12

... ddd 12/17 SO-14 MECHANICAL DATA mm. MIN. TYP MAX. 1.35 1.75 0.1 0.25 1.10 1.65 0.33 0.51 0.19 0.25 8.55 8.75 3.8 4.0 1.27 5.8 6.2 0.25 0.50 0.4 1.27 0° 8° 0.100 74LCX74 inch MIN. TYP. MAX. 0.053 0.069 0.004 0.010 0.043 0.065 0.013 0.020 0.007 0.010 0.337 0.344 0.150 0.157 0.050 0.228 0.244 0.010 0.020 0.016 0.050 0° 8° 0.004 0016019D ...

Page 13

... DIM PIN 1 IDENTIFICATION TSSOP14 MECHANICAL DATA mm. MIN. TYP MAX. 1.2 0.05 0.15 0.8 1 1.05 0.19 0.30 0.09 0.20 4.9 5 5.1 6.2 6.4 6.6 4.3 4.4 4.48 0.65 BSC 0˚ 8˚ 0.45 0.60 0. Package mechanical data inch MIN. TYP. 0.002 0.004 0.031 0.039 0.007 0.004 0.193 0.197 0.244 0.252 0.169 0.173 0.0256 BSC 0˚ ...

Page 14

... Package mechanical data DIM 14/17 Tape & Reel SO-14 MECHANICAL DATA mm. MIN. TYP MAX. 330 12.8 13.2 20.2 60 22.4 6.4 6.6 9 9.2 2.1 2.3 3.9 4.1 7.9 8.1 74LCX74 inch MIN. TYP. MAX. 12.992 0.504 0.519 0.795 2.362 0.882 0.252 0.260 0.354 0.362 0.082 0.090 0.153 0.161 0.311 0.319 ...

Page 15

... DIM Tape & Reel TSSOP14 MECHANICAL DATA mm. MIN. TYP MAX. 330 12.8 13.2 20.2 60 22.4 6.7 6.9 5.3 5.5 1.6 1.8 3.9 4.1 7.9 8.1 Package mechanical data inch MIN. TYP. MAX. 12.992 0.504 0.519 0.795 2.362 0.882 0.264 0.272 0.209 0.217 0.063 0.071 0.153 0.161 0.311 0.319 15/17 ...

Page 16

... Revision history 8 Revision history Table 9. Revision history Date 15-Sep-2004 10-Jul-2006 16/17 Revision 7 Ordering codes revision - pag New template, temperature ranges updated 74LCX74 Changes ...

Page 17

... Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. ...

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