74abt543ad NXP Semiconductors, 74abt543ad Datasheet - Page 2

• Manufacturer Part Number: 74abt543ad
• Description: Octal Latched Transceiver With Dual Enable 3-state
• Manufacturer: NXP Semiconductors

FEATURES
DESCRIPTION
The 74ABT543A high-performance BiCMOS device combines low
static and dynamic power dissipation with high speed and high
output drive.
QUICK REFERENCE DATA
ORDERING INFORMATION
PIN CONFIGURATION
Philips Semiconductors
24-Pin Plastic DIP
24-Pin plastic SO
24-Pin Plastic SSOP Type II
24-Pin Plastic TSSOP Type I
1998 Sep 24
Combines 74ABT245 and 74ABT373 type functions in one device
8-bit octal transceiver with D-type latch
Back-to-back registers for storage
Separate controls for data flow in each direction
Output capability: +64mA/–32mA
Live insertion/extraction permitted
Power-up 3-State
Power-up reset
Latch-up protection exceeds 500mA per Jedec Std 17
ESD protection exceeds 2000 V per MIL STD 883 Method 3015
and 200 V per Machine Model
Octal latched transceiver with dual enable
(3-State)
SYMBOL
I
t
t
C
C
PLH
PHL
CCZ
I/O
IN
PACKAGES
OEBA
LEBA
GND
EAB
Propagation delay
An to Bn or Bn to An
Input capacitance
I/O capacitance
Total supply current
A2
A3
A6
A0
A1
A4
A5
A7
10
11
12
1
2
3
4
5
6
7
8
9
PARAMETER
TEMPERATURE RANGE
24
23
22
21
20
19
18
17
16
15
14
13
SA00168
V
EBA
B0
B1
B2
B3
B4
B5
B6
B7
LEAB
OEAB
–40 C to +85 C
–40 C to +85 C
–40 C to +85 C
–40 C to +85 C
CC
C
V
Outputs disabled;
V
Outputs disabled; V
I
O
L
= 0V or V
= 50pF; V
= 0V or V
OUTSIDE NORTH AMERICA
2
74ABT543A PW
74ABT543A DB
The 74ABT543A Octal Registered Transceiver contains two sets of
D-type latches for temporary storage of data flowing in either
direction. Separate Latch Enable (LEAB, LEBA) and Output Enable
(OEAB, OEBA) inputs are provided for each register to permit
independent control of data transfer in either direction. The outputs
are guaranteed to sink 64mA.
FUNCTIONAL DESCRIPTION
The 74ABT543A contains two sets of eight D-type latches, with
separate control pins for each set. Using data flow from A to B as an
example, when the A-to-B Enable (EAB) input and the A-to-B Latch
Enable (LEAB) input are Low the A-to-B path is transparent. A
subsequent Low-to-High transition of the LEAB signal puts the A
data into the latches where it is stored and the B outputs no longer
change with the A inputs. With EAB and OEAB both Low, the
3-State B output buffers are active and display the data present at
the outputs of the A latches.
Control of data flow from B to A is similar, but using the EBA, LEBA,
and OEBA inputs.
PIN DESCRIPTION
T
74ABT543A N
74ABT543A D
CC
amb
PIN NUMBER
22, 21, 20, 19,
CC
18, 17, 16, 15
CC
7, 8, 9, 10
3, 4, 5, 6,
CONDITIONS
= 5V
= 25 C; GND = 0V
11, 23
14, 1
13, 2
12
24
CC
=5.5V
OEAB / OEBA
LEAB / LEBA
EAB / EBA
SYMBOL
A0 – A7
B0 – B7
GND
V
CC
NORTH AMERICA
7ABT543APW DH
74ABT543A DB
74ABT543A N
74ABT543A D
A to B / B to A Latch Enable
input (active-Low)
A to B / B to A Enable input
(active-Low)
A to B / B to A Output Enable
input (active-Low)
Port A, 3-State outputs
Port B, 3-State outputs
Ground (0V)
Positive supply voltage
TYPICAL
74ABT543A
110
2.9
3.6
4
7
Product specification
FUNCTION
DWG NUMBER
853-1794 20080
SOT222-1
SOT137-1
SOT340-1
SOT355-1
UNIT
pF
pF
ns
A