74aup2g17gw NXP Semiconductors, 74aup2g17gw Datasheet

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74aup2g17gw

Manufacturer Part Number
74aup2g17gw
Description
74aup2g17 Low-power Dual Schmitt Trigger
Manufacturer
NXP Semiconductors
Datasheet

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Part Number
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Part Number:
74AUP2G17GW
Manufacturer:
NEXPERIA/安世
Quantity:
20 000
1. General description
2. Features
The 74AUP2G17 is a high-performance, low-power, low-voltage, Si-gate CMOS device,
superior to most advanced CMOS compatible TTL families.
This device ensures a very low static and dynamic power consumption across the entire
V
This device is fully specified for partial power-down applications using I
The I
the device when it is powered down.
The 74AUP2G17 provides two Schmitt trigger buffers. It is capable of transforming slowly
changing input signals into sharply defined, jitter-free output signals.
The inputs switch at different points for positive and negative-going signals. The difference
between the positive voltage V
hysteresis voltage V
CC
74AUP2G17
Low-power dual Schmitt trigger
Rev. 02 — 10 January 2008
Wide supply voltage range from 0.8 V to 3.6 V
High noise immunity
Complies with JEDEC standards:
ESD protection:
Low static power consumption; I
Latch-up performance exceeds 100 mA per JESD 78 Class II
Inputs accept voltages up to 3.6 V
Low noise overshoot and undershoot < 10 % of V
I
Multiple package options
Specified from 40 C to +85 C and 40 C to +125 C
OFF
range from 0.8 V to 3.6 V.
OFF
JESD8-12 (0.8 V to 1.3 V)
JESD8-11 (0.9 V to 1.65 V)
JESD8-7 (1.2 V to 1.95 V)
JESD8-5 (1.8 V to 2.7 V)
JESD8-B (2.7 V to 3.6 V)
HBM JESD22-A114E Class 3A exceeds 5000 V
MM JESD22-A115-A exceeds 200 V
CDM JESD22-C101-C exceeds 1000 V
circuitry provides partial Power-down mode operation
circuitry disables the output, preventing the damaging backflow current through
H
.
T+
and the negative voltage V
CC
= 0.9 A (maximum)
CC
T
is defined as the input
Product data sheet
OFF
.

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74aup2g17gw Summary of contents

Page 1

Low-power dual Schmitt trigger Rev. 02 — 10 January 2008 1. General description The 74AUP2G17 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. This device ensures a very low static and ...

Page 2

... Ordering information Type number Package Temperature range Name 74AUP2G17GW +125 C 74AUP2G17GM +125 C 74AUP2G17GF +125 C 4. Marking Table 2. Marking Type number 74AUP2G17GW 74AUP2G17GM 74AUP2G17GF 5. Functional diagram mnb066 Fig 1. Logic symbol Fig 3. Logic diagram 74AUP2G17_2 Product data sheet Description SC-88 plastic surface-mounted package ...

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... NXP Semiconductors 6. Pinning information 6.1 Pinning 74AUP2G17 GND 001aab674 Fig 4. Pin configuration SOT363 (SC-88) 6.2 Pin description Table 3. Pin description Symbol Pin 1A 1 GND Functional description [1] Table 4. Function table Input [ HIGH voltage level ...

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... NXP Semiconductors 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter V supply voltage CC I input clamping current IK V input voltage I I output clamping current OK V output voltage O I output current ...

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... NXP Semiconductors Table 7. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter V LOW-level output voltage OL I input leakage current I I power-off leakage current OFF I additional power-off leakage OFF current I supply current CC I additional supply current CC C input capacitance ...

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... NXP Semiconductors Table 7. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter I additional power-off leakage OFF current I supply current CC I additional supply current +125 C amb V HIGH-level output voltage OH V LOW-level output voltage OL I input leakage current ...

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... NXP Semiconductors 11. Dynamic characteristics Table 8. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Symbol Parameter Conditions propagation delay nA to nY; see propagation delay nA to nY; see ...

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... NXP Semiconductors Table 8. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Symbol Parameter Conditions pF and power dissipation MHz capacitance [1] All typical values are measured at nominal V [ the same as t ...

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... NXP Semiconductors Test data is given in Table 10. Definitions for test circuit Load resistance Load capacitance including jig and probe capacitance Termination resistance should be equal to the output impedance External voltage for measuring switching times. EXT Fig 8. Load circuitry for switching times Table 10 ...

Page 10

... NXP Semiconductors Table 11. Transfer characteristics Voltages are referenced to GND (ground = 0 V; for test circuit see Symbol Parameter Conditions V hysteresis voltage ( Figure Figure 14. Waveforms transfer characteristics Fig 9. Transfer characteristic 74AUP2G17_2 Product data sheet …continued ...

Page 11

... NXP Semiconductors Fig 11. Typical transfer characteristics; V Fig 12. Typical transfer characteristics; V 74AUP2G17_2 Product data sheet 240 160 0.4 0.8 1 1200 800 400 0 0 1.0 2 Rev. 02 — 10 January 2008 74AUP2G17 Low-power dual Schmitt trigger 001aad691 1.6 2.0 V (V) I 001aad692 3.0 V (V) I © NXP B.V. 2008. All rights reserved. ...

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... NXP Semiconductors 15. Application information The slow input rise and fall times cause additional power dissipation, this can be calculated using the following formula add additional power dissipation ( W); add f = input frequency (MHz input rise time (ns input fall time (ns ...

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... NXP Semiconductors 16. Package outline Plastic surface-mounted package; 6 leads y 6 pin 1 index DIMENSIONS (mm are the original dimensions UNIT max 0.30 1.1 0.25 mm 0.1 0.20 0.8 0.10 OUTLINE VERSION IEC SOT363 Fig 14. Package outline SOT363 (SC-88) 74AUP2G17_2 Product data sheet scale ...

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... NXP Semiconductors XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1. (2) terminal 1 index area DIMENSIONS (mm are the original dimensions) ( UNIT b D max max 0.25 1.5 mm 0.5 0.04 0.17 1.4 Notes 1. Including plating thickness. 2. Can be visible in some manufacturing processes. OUTLINE VERSION ...

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... NXP Semiconductors XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 0 (1) terminal 1 index area DIMENSIONS (mm are the original dimensions UNIT b D max max 0.20 1.05 mm 0.5 0.04 0.12 0.95 Note 1. Can be visible in some manufacturing processes. OUTLINE VERSION IEC SOT891 Fig 16. Package outline SOT891 (XSON6) ...

Page 16

... NXP Semiconductors 17. Abbreviations Table 12. Abbreviations Acronym Description CDM Charged Device Model CMOS Complementary Metal Oxide Semiconductor DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model TTL Transistor-Transistor Logic 18. Revision history Table 13. Revision history Document ID Release date 74AUP2G17_2 20080110 • ...

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... Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...

Page 18

... NXP Semiconductors 21. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 4 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 5 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 6 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 7 Functional description . . . . . . . . . . . . . . . . . . . 3 8 Limiting values Recommended operating conditions Static characteristics Dynamic characteristics . . . . . . . . . . . . . . . . . . 7 12 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 13 Transfer characteristics Waveforms transfer characteristics ...

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