74alvt16821dl NXP Semiconductors, 74alvt16821dl Datasheet

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74alvt16821dl

Manufacturer Part Number
74alvt16821dl
Description
20-bit Bus-interface D-type Flip-flop; Positive-edge Trigger 3-state
Manufacturer
NXP Semiconductors
Datasheet
1. General description
2. Features
The 74ALVT16821 high-performance Bipolar Complementary Metal Oxide
Semiconductor (BiCMOS) device combines low static and dynamic power dissipation with
high speed and high output drive. It is designed for V
I/O compatibility to 5 V.
The 74ALVT16821 has two 10-bit, edge triggered registers, with each register coupled to
a 3-state output buffer. The two sections of each register are controlled independently by
the clock (nCP) and output enable (nOE) control gates.
Each register is fully edge triggered. The state of each D input, one set-up time before the
LOW-to-HIGH clock transition, is transferred to the corresponding flip-flops Q output.
The 3-state output buffers are designed to drive heavily loaded 3-state buses, MOS
memories, or MOS microprocessors.
The active low output enable (nOE) controls all ten 3-state buffers independent of the
register operation. When nOE is LOW, the data in the register appears at the outputs.
When nOE is HIGH, the outputs are in high-impedance OFF-state, which means they will
neither drive nor load the bus.
74ALVT16821
20-bit bus interface D-type flip-flop; positive-edge trigger;
3-state
Rev. 03 — 13 June 2005
20-bit positive-edge triggered register
5 V I/O compatible
Multiple V
Bus hold data inputs eliminate the need for external pull-up resistors to hold unused
inputs
Live insertion and extraction permitted
Power-up reset
Power-up 3-state
Output capability: +64 mA and 32 mA
Latch-up protection:
ESD protection:
JESD78: exceeds 500 mA
MIL STD 883, method 3015: exceeds 2000 V
Machine model: exceeds 200 V
CC
and GND pins minimize switching noise
CC
operation at 2.5 V or 3.3 V with
Product data sheet

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74alvt16821dl Summary of contents

Page 1

D-type flip-flop; positive-edge trigger; 3-state Rev. 03 — 13 June 2005 1. General description The 74ALVT16821 high-performance Bipolar Complementary Metal Oxide Semiconductor (BiCMOS) device combines low static and dynamic power dissipation with high speed and high ...

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... Ordering information Table 2: Ordering information Type number Package Temperature range 74ALVT16821DL +85 C 74ALVT16821DGG +85 C 9397 750 15123 Product data sheet 20-bit bus interface D-type flip-flop; positive-edge trigger; 3-state Quick reference data = 25 C. amb Parameter propagation delay nCP to nQx ...

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Philips Semiconductors 5. Functional diagram 1D0 1D1 1D2 1D3 1D4 1D5 1D6 1D7 1D8 1D9 56 1CP 1 1OE 1Q0 1Q1 1Q2 1Q3 1Q4 1Q5 1Q6 1Q7 1Q8 1Q9 ...

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Philips Semiconductors 6. Pinning information 6.1 Pinning Fig 4. Pin configuration 6.2 Pin description Table 3: Symbol 1OE 1Q0 1Q1 GND 1Q2 1Q3 V CC 1Q4 9397 750 15123 Product data sheet 20-bit bus interface D-type flip-flop; positive-edge trigger; 3-state ...

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Philips Semiconductors Table 3: Symbol 1Q5 1Q6 GND 1Q7 1Q8 1Q9 2Q0 2Q1 2Q2 GND 2Q3 2Q4 2Q5 V CC 2Q6 2Q7 GND 2Q8 2Q9 2OE 2CP 2D9 2D8 GND 2D7 2D6 V CC 2D5 2D4 2D3 GND 2D2 2D1 ...

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Philips Semiconductors Table 3: Symbol V CC 1D3 1D2 GND 1D1 1D0 1CP 7. Functional description 7.1 Function table Table 4: Operating mode Load and read register Hold Disable outputs [ HIGH voltage level HIGH voltage ...

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Philips Semiconductors Table 5: In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol stg T j [1] The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings ...

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Philips Semiconductors 10. Static characteristics Table 7: Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = amb Symbol Parameter [ 2.5 V 0.2 V ...

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Philips Semiconductors Table 7: Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = amb Symbol Parameter [ 3 input ...

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Philips Semiconductors [5] This parameter is valid for any V a transition time of 100 s is permitted. This parameter is valid for T [ measured with outputs pulled [7] This is the increase ...

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Philips Semiconductors 12. Waveforms Fig 5. Propagation delay clock input (nCP) to output (nQx), clock pulse (nCP) width and Fig 6. Data set-up and hold times Fig 7. 3-state output enable time to HIGH-level and output disable time from HIGH-level ...

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Philips Semiconductors Fig 8. 3-state output enable time to LOW-level and output disable time from LOW-level Table 9: Supply voltage 3 V 2.7 V 9397 750 15123 Product data sheet 20-bit bus interface D-type flip-flop; positive-edge trigger; 3-state V I ...

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Philips Semiconductors a. Input pulse definition b. Test circuit Fig 9. Load circuitry for switching times Table 10: Input whichever is less 9397 750 15123 Product data sheet 20-bit bus interface D-type flip-flop; positive-edge ...

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Philips Semiconductors 13. Package outline SSOP56: plastic shrink small outline package; 56 leads; body width 7 pin 1 index 1 e DIMENSIONS (mm are the original dimensions) A UNIT max. ...

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Philips Semiconductors TSSOP56: plastic thin shrink small outline package; 56 leads; body width 6 pin 1 index 1 DIMENSIONS (mm are the original dimensions). A UNIT max. 0.15 1.05 mm ...

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Philips Semiconductors 14. Revision history Table 11: Revision history Document ID Release date 74ALVT16821_3 20050613 • Modifications: The format of this data sheet has been redesigned to comply with the new presentation and information standard of Philips Semiconductors. • Section ...

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Philips Semiconductors 15. Data sheet status [1] Level Data sheet status Product status I Objective data Development II Preliminary data Qualification III Product data Production [1] Please consult the most recently issued data sheet before initiating or completing a design. ...

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Philips Semiconductors 20. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . ...

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