93lc76ct-i-st Microchip Technology Inc., 93lc76ct-i-st Datasheet - Page 10

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93lc76ct-i-st

Manufacturer Part Number
93lc76ct-i-st
Description
8k Microwire Compatible Serial Eeprom
Manufacturer
Microchip Technology Inc.
Datasheet
93AA76A/B/C, 93LC76A/B/C, 93C76A/B/C
2.9
The Write All (WRAL) instruction will write the entire
memory array with the data specified in the command.
The self-timed auto-erase and programming cycle is
initiated by the rising edge of CLK on the last data bit.
Clocking of the CLK pin is not necessary after the
device has entered the WRAL cycle. The WRAL
command does include an automatic ERAL cycle for
the device. Therefore, the WRAL instruction does not
require an ERAL instruction, but the chip must be in the
EWEN status.
FIGURE 2-7:
DS21796J-page 10
CLK
DO
CS
DI
Write All (WRAL)
1
High-Z
WRAL TIMING
0
0
0
1
x
•••
x
The DO pin indicates the Ready/Busy status of the
device if CS is brought high after a minimum of 250 ns
low (T
V
Dx
CC
Note:
Note:
must be ≥ 4.5V for proper operation of WRAL.
CSL
•••
)..
The write sequence requires a logic high
signal on the PE pin prior to the rising
edge of the last data bit.
After the Write All cycle is complete,
issuing a Start bit and then taking CS low
will clear the Ready/Busy status from DO.
D0
T
CSL
T
WL
Busy
© 2007 Microchip Technology Inc.
T
SV
Ready
High-Z
T
CZ

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