93lc76ct-i-st Microchip Technology Inc., 93lc76ct-i-st Datasheet - Page 6

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93lc76ct-i-st

Manufacturer Part Number
93lc76ct-i-st
Description
8k Microwire Compatible Serial Eeprom
Manufacturer
Microchip Technology Inc.
Datasheet
93AA76A/B/C, 93LC76A/B/C, 93C76A/B/C
2.4
The ERASE instruction forces all data bits of the
specified address to the logical ‘1’ state. The rising
edge of CLK before the last address bit initiates the
write cycle.
FIGURE 2-1:
DS21796J-page 6
CLK
DO
CS
DI
Erase
High-Z
1
ERASE TIMING
1
1
A
N
A
N
-1 A
N
-2
•••
A0
The DO pin indicates the Ready/Busy status of the
device if CS is brought high after a minimum of 250 ns
low (T
is still in progress. DO at logical ‘1’ indicates that the
register at the specified address has been erased and
the device is ready for another instruction.
Note:
T
CSL
CSL
). DO at logical ‘0’ indicates that programming
After the Erase cycle is complete, issuing
a Start bit and then taking CS low will clear
the Ready/Busy status from DO.
T
WC
T
SV
Check Status
Busy
© 2007 Microchip Technology Inc.
Ready
High-Z
T
CZ

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