at93c86a ATMEL Corporation, at93c86a Datasheet - Page 6
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at93c86a
Manufacturer Part Number
at93c86a
Description
Three-wire Serial Eeprom 16k 2048 X 8 Or 1024 X 16
Manufacturer
ATMEL Corporation
Datasheet
1.AT93C86A.pdf
(18 pages)
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250 ns (t
). A logic “0” at DO indicates that programming is still in progress. A logic “1”
CS
indicates that the memory location at the specified address has been written with the
data pattern contained in the instruction and the part is ready for further instructions. A
Ready/Busy status cannot be obtained if the CS is brought high after the end of the self-
timed programming cycle t
.
WP
ERASE ALL (ERAL): The Erase All (ERAL) instruction programs every bit in the mem-
ory array to the logic “1” state and is primarily used for testing purposes. The DO pin
outputs the Ready/Busy status of the part if CS is brought high after being kept low for a
= 5.0V ± 10%.
minimum of 250 ns (t
). The ERAL instruction is valid only at V
CS
CC
WRITE ALL (WRAL): The Write All (WRAL) instruction programs all memory locations
with the data patterns specified in the instruction. The DO pin outputs the Ready/Busy
status of the part if CS is brought high after being kept low for a minimum of 250 ns (t
).
CS
The WRAL instruction is valid only at V
= 5.0V ± 10%.
CC
ERASE/WRITE DISABLE (EWDS): To protect against accidental data disturbance, the
Erase/Write Disable (EWDS) instruction disables all programming modes and should be
executed after all programming operations. The operation of the READ instruction is
independent of both the EWEN and EWDS instructions and can be executed at any
time.
AT93C86A
6
3408H–SEEPR–1/07