at24c128b ATMEL Corporation, at24c128b Datasheet - Page 7

• Manufacturer Part Number: at24c128b
• Description: Two-wire Serial Eeprom 128k 16,384 X 8
• Manufacturer: ATMEL Corporation

Figure 6-3.
Figure 6-4.
Figure 6-5.
Note:
5296A–SEEPR–1/08
SCL
SDA
SDA
SCL
1. The write cycle time t
SDA OUT
SDA IN
WORDn
Software Reset
Bus Timing
Write Cycle Timing
Start bit
SCL
8th BIT
cycles, (c) create another start bit followed by stop bit condition as shown below. The device is
ready for next communication after above steps have been completed.
t
SU.STA
1
WR
is the time from a valid stop condition of a write sequence to the end of the internal clear/write cycle.
ACK
2
t
HD.STA
t
t
F
LOW
CONDITION
Dummy Clock Cycles
STOP
3
t
AA
t
HIGH
t
HD.DAT
t
8
wr
t
(1)
LOW
9
t
t
SU.DAT
DH
CONDITION
START
Start bit
t
Stop bit
R
t
SU.STO
t
BUF
7