at25df641 ATMEL Corporation, at25df641 Datasheet - Page 35

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at25df641

Manufacturer Part Number
at25df641
Description
At25df641 64-megabit 2.7-volt Minimum Spi Serial Flash Memory
Manufacturer
ATMEL Corporation
Datasheet

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11. Status Register Commands
11.1
3680B–DFLASH–2/08
Read Status Register
The two-byte Status Register can be read to determine the device’s ready/busy status, as well
as the status of many other functions such as Hardware Locking and Software Protection. The
Status Register can be read at any time, including during an internally self-timed program or
erase operation.
To read the Status Register, the CS pin must first be asserted and the opcode of 05h must be
clocked into the device. After the opcode has been clocked in, the device will begin outputting
Status Register data on the SO pin during every subsequent clock cycle. After the second byte
of the Status Register has been clocked out, the sequence will repeat itself starting again with
the first byte of the Status Register as long as the CS pin remains asserted and the clock pin is
being pulsed. The data in the Status Register is constantly being updated, so each repeating
sequence will output new data. The RDY/BSY status is available for both bytes of the Status
Register and is updated for each byte.
At clock frequencies above f
not be valid. Therefore, if operating at clock frequencies above f
must be clocked out from the device in order to read the correct values of both bytes of the Sta-
tus Register.
Deasserting the CS pin will terminate the Read Status Register operation and put the SO pin
into a high-impedance state. The CS pin can be deasserted at any time and does not require
that a full byte of data be read.
CLK
, the first two bytes of data output from the Status Register will
AT25DF641 [Preliminary]
CLK
, at least four bytes of data
35

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