at49lv1024 ATMEL Corporation, at49lv1024 Datasheet
at49lv1024
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at49lv1024 Summary of contents
Page 1
... Atmel’s advanced nonvolatile CMOS technology, the devices offer access times with power dissipation of just 90 mW over the commercial temperature range. The only difference between the AT49LV1024 and the AT49LV1025 is the package. To allow for simple in-system reprogrammability, the AT49LV1024/1025 does not require high input voltages for programming ...
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... ADDRESS INPUTS X DECODER READ: The AT49LV1024/1025 is accessed like an EPROM. When CE and OE are low and WE is high, the data stored at the memory location determined by the address pins is asserted on the outputs. The outputs are put in the high-impedance state whenever high. This dual-line control gives designers flexibility in preventing bus contention ...
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... Entry/Exit” on page 11. The manufacturer and device code is the same for both modes. DATA POLLING: The AT49LV1024/1025 features Data Polling to indicate the end of a program or erase cycle. During a program cycle an attempted read of the last byte loaded will result in the complement of the loaded data on I/O7. Once the program cycle has been completed, true data is valid on all outputs and the next cycle may begin ...
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... Temperature under Bias ................................ -55°C to +125°C Storage Temperature ..................................... -65°C to +150°C All Input Voltages (including NC Pins) with Respect to Ground ...................................-0.6V to +6.25V All Output Voltages with Respect to Ground .............................-0. Voltage on OE with Respect to Ground ...................................-0.6V to +13.5V AT49LV1024/1025 4 1st Bus 2nd Bus 3rd Bus Cycle Cycle Cycle Data ...
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... Condition MHz OUT -400 µA OH AT49LV1024/1025 AT49LV1024/1025-90 0°C - 70°C 0°C - 70°C -40°C - 85°C (1) 3.0V to 3.6V 3.0V to 3. OUT High-Z High-Z ( Manufacturer Code Device Code ...
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... AT49LV1024/1025-55 AT49LV1024/1025-70 Min Max after the address transition without impact on t ACC after the falling edge of CE without impact pF). L AT49LV1024/1025-90 Min Max Min ACC after an address change CE ACC ...
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... Input Test Waveforms and Measurement Level Output Test Load Pin Capacitance ( MHz 25°C Symbol Typ OUT Note: 1. This parameter is characterized and is not 100% tested. 1278D–07/01 2.4V 0. < 3.0V 1.8K OUTPUT PIN 30 pF 1.3K Max 6 12 AT49LV1024/1025 Units Conditions OUT 7 ...
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... Write Pulse Width ( Data Setup Time Data, OE Hold Time DH OEH t Write Pulse Width High WPH AC Word Load Waveforms WE Controlled OE ADDRESS CE WE DATA IN CE Controlled OE ADDRESS WE CE DATA IN AT49LV1024/1025 OES OEH OES t OEH ...
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... For chip erase, the address should be 10H. For a main memory erase, the data should be 30H. 1278D–07/ WPH 5555 2AAA 5555 5555 WORD 0 WORD 1 WORD 2 AT49LV1024/1025 Min Typ 1.5 2AAA 5555 NOTE 2 WORD 3 WORD 4 WORD 5 Max ...
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... Read Characteristics” on page 6. OE (1)(2)(3) Toggle Bit Waveforms Notes: 1. Toggling either both OE and CE will operate toggle bit. The t input(s). 2. Beginning and ending state of I/O6 will vary. 3. Any address location may be used but the address should not vary. AT49LV1024/1025 10 (1) (1) Min Typ Max 10 10 ...
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... ADDRESS 2AAA LOAD DATA 90 TO ADDRESS 5555 ENTER PRODUCT IDENTIFICATION (2)(3)(5) MODE (1) OR LOAD DATA AA TO ADDRESS 5555 LOAD DATA 55 IDENTIFICATION TO ADDRESS 2AAA LOAD DATA F0 TO ADDRESS 5555 EXIT PRODUCT IDENTIFICATION (4) MODE ; AT49LV1024/1025 LOAD DATA F0 TO ANY ADDRESS EXIT PRODUCT (4) MODE 11 ...
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... Boot Block Lockout Enable Algorithm Notes: 1. Data Format: I/O15 - I/O8 (Don’t Care); I/O7 - I/O0 (Hex); Address Format: A15 - A0 (Hex); A15 (Don’t Care). 2. Boot Block Lockout feature enabled. AT49LV1024/1025 12 (1) LOAD DATA AA TO ADDRESS 5555 LOAD DATA 55 TO ADDRESS 2AAA LOAD DATA 80 TO ...
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... AT49LV1024 Ordering Information I (mA ACC (ns) Active Standby 0.04 25 0.13 AT49LV1025 Ordering Information I (mA ACC (ns) Active Standby 0.04 25 0.13 40V 40-lead, Thin Small Outline Package (VSOP) ( mm) 44J 44-lead, Plastic, J-leaded Chip Carrier Package (PLCC) 1278D–07/01 ...
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... Packaging Information 40V, 40-lead, Plastic Thin Small Outline Package (VSOP) Dimensions in Millimeters and (Inches)* *Controlling dimension: millimeters AT49LV1024/1025 14 44J, 44-lead, Plastic J-leaded Chip Carrier (PLCC) Dimensions in Inches and (Millimeters) JEDEC STANDARD MS-018 AC .045(1.14) X 30° - 45° .045(1.14) X 45° PIN NO. 1 IDENTIFY ...
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... Atmel Corporation 2001. Atmel Corporation makes no warranty for the use of its products, other than those expressly contained in the Company’s standard warranty which is detailed in Atmel’s Terms and Conditions located on the Company’s web site. The Company assumes no responsibility for any errors which may appear in this document, reserves the right to change devices or specifications detailed herein at any time without notice, and does not make any commitment to update the information contained herein ...