is42s16100c1 Integrated Silicon Solution, Inc., is42s16100c1 Datasheet - Page 8

• Manufacturer Part Number: is42s16100c1
• Description: 512k Words X 16 Bits X 2 Banks 16-mbit Synchronous Dynamic Ram
• Manufacturer: Integrated Silicon Solution, Inc.

8
IS42S16100C1
OPERATING FREQUENCY / LATENCY RELATIONSHIPS
AC TEST CONDITIONS
Input
SYMBOL
—
—
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
CAC
RCD
RAC
RC
RAS
RP
RRD
CCD
DPL
DAL
RBD
WBD
RQL
WDL
PQL
QMD
DMD
MCD
OUTPUT
INPUT
CLK
PARAMETER
Clock Cycle Time
Operating Frequency
CAS Latency
Active Command To Read/Write Command Delay Time
RAS Latency (t
Command Period (REF to REF / ACT to ACT)
Command Period (ACT to PRE)
Command Period (PRE to ACT)
Command Period (ACT[0] to ACT [1])
Column Command Delay Time
(READ, READA, WRIT, WRITA)
Input Data To Precharge Command Delay Time
Input Data To Active/Refresh Command Delay Time
(During Auto-Precharge)
Burst Stop Command To Output in HIGH-Z Delay Time
(Read)
Burst Stop Command To Input in Invalid Delay Time
(Write)
Precharge Command To Output in HIGH-Z Delay Time
(Read)
Precharge Command To Input in Invalid Delay Time
(Write)
Last Output To Auto-Precharge Start Time (Read)
DQM To Output Delay Time (Read)
DQM To Input Delay Time (Write)
Mode Register Set To Command Delay Time
2.8V
1.4V
0.0V
2.8V
1.4V
0.0V
t
CS
t
RCD
OH
(Input/Output Reference Level: 1.4V)
+ t
CAC
t
t
1.4V
CHI
CH
)
t
CK
t
CL
t
AC
1.4V
Integrated Silicon Solution, Inc. — www.issi.com —
Output Load
I/O
50 pF
200
-5
-2
5
3
3
6
9
6
3
3
1
1
4
3
0
3
0
2
0
2
50 Ω
166
-6
–2
6
3
3
6
9
6
3
3
1
1
4
3
0
3
0
2
0
2
143
-7
–1
+1.4V
7
3
3
6
9
6
3
3
1
1
4
3
0
3
0
2
0
2
ISSI
1-800-379-4774
UNITS
cycle
cycle
cycle
cycle
cycle
cycle
cycle
cycle
cycle
cycle
cycle
cycle
cycle
cycle
cycle
cycle
cycle
cycle
MHz
ns
11/03/06
Rev. D
®