m95128 STMicroelectronics, m95128 Datasheet - Page 15
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m95128
Manufacturer Part Number
m95128
Description
128 Kbit Serial Spi Bus Eeprom With High Speed Clock
Manufacturer
STMicroelectronics
Datasheet
1.M95128.pdf
(44 pages)
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M95128, M95128-W, M95128-R
5.2
Write Disable (WRDI)
One way of resetting the Write Enable Latch (WEL) bit is to send a Write Disable instruction
to the device.
As shown in
and the bits of the instruction byte are shifted in, on Serial Data Input (D).
The device then enters a wait state. It waits for a the device to be deselected, by Chip Select
(S) being driven High.
The Write Enable Latch (WEL) bit, in fact, becomes reset by any of the following events:
Figure 6.
Power-up
WRDI instruction execution
WRSR instruction completion
WRITE instruction completion.
Figure
Write Disable (WRDI) sequence
S
C
D
Q
6, to send this instruction to the device, Chip Select (S) is driven Low,
High Impedance
0
1
2
Instruction
3
4
5
6
7
AI03750D
Instructions
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