cy62127dv18 Cypress Semiconductor Corporation., cy62127dv18 Datasheet - Page 8

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cy62127dv18

Manufacturer Part Number
cy62127dv18
Description
1m 64k X 16 Static Ram Semiconductor
Manufacturer
Cypress Semiconductor Corporation.
Datasheet
Switching Waveforms
Document #:
Write Cycle No. 1 (WE Controlled)
Write Cycle No. 2 (CE1 or CE
Notes:
16. Data I/O is high-impedance if OE
17. If CE
18. During the DON’T CARE period in the DATA I/O waveform, the I/Os are in output state and input signals should not be applied.
ADDRESS
ATA I/O
B H E/B L E
1
CE 1
CE 2
ADDRESS
WE
OE
goes HIGH or CE
DATA I/O
BHE /BLE
CE
CE
38-05226
WE
OE
1
2
DON’ T CARE
DON’T CARE
2
Rev.
goes LOW simultaneously with WE HIGH, the output remains in a high-impedance state.
**
(continued)
= V
2
t
IH
Controlled)
SA
t
.
HZOE
t
[12, 16, 17,
HZOE
[12, 16, 17,
t
18]
SA
t
INFORMATION
AW
t
AW
18]
ADVANCE
t
SCE
t
WC
t
WC
t
BW
t
BW
DATA
t
t
DATA
t
PWE
SD
t
PWE
SD
IN
IN
t
SCE
VALID
VALID
t
t
HA
HA
t
t
HD
HD
CY62127DV18
MoBL2
Page 8 of 13
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