m48z12 STMicroelectronics, m48z12 Datasheet - Page 8

• Manufacturer Part Number: m48z12
• Description: 5v, 16kbit 2kb X 8 Zeropower Sram
• Manufacturer: STMicroelectronics

Figure 4.
Note:
Table 3.
1. Valid for ambient operating temperature: T
2.2
8/20
Symbol
noted).
t
t
t
t
t
t
t
t
t
GHQZ
AVQV
GLQV
GLQX
EHQZ
AXQX
ELQV
ELQX
AVAV
A0-A10
E
G
DQ0-DQ7
Read mode AC waveforms
WRITE Enable (W) = High.
Read mode AC characteristics
Write mode
The M48Z02/12 is in the WRITE Mode whenever W and E are active. The start of a WRITE
is referenced from the latter occurring falling edge of W or E. A WRITE is terminated by the
earlier rising edge of W or E. The addresses must be held valid throughout the cycle. E or W
must return high for a minimum of t
prior to the initiation of another READ or WRITE cycle. Data-in must be valid t
the end of WRITE and remain valid for t
WRITE cycles to avoid bus contention; although, if the output bus has been activated by a
low on E and G, a low on W will disable the outputs t
READ cycle time
Address valid to output valid
Chip enable low to output valid
Output enable low to output valid
Chip enable low to output transition
Output enable low to output transition
Chip enable high to output Hi-Z
Output enable high to output Hi-Z
Address transition to output transition
Parameter
A
tAVQV
tELQX
= 0 to 70°C or –40 to 85°C; V
(1)
tGLQX
tELQV
tGLQV
EHAX
tAVAV
VALID
WHDX
from Chip Enable or t
afterward. G should be kept high during
Min
70
10
5
5
CC
–70
= 4.75 to 5.5V or 4.5 to 5.5V (except where
WLQZ
Max
70
70
35
25
25
VALID
M48Z02/M48Z12
after W falls.
Min
150
10
5
5
tGHQZ
WHAX
–150
Max
150
150
35
75
35
from WRITE Enable
Min
200
10
5
5
–200
tAXQX
tEHQZ
AI01330
DVWH
Max
200
200
80
40
40
prior to
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns