psd813f1a STMicroelectronics, psd813f1a Datasheet - Page 70

• Manufacturer Part Number: psd813f1a
• Description: Flash In-system Programmable Isp Peripherals For 8-bit Mcus, 5 V
• Manufacturer: STMicroelectronics

PSD813F1A
Table 33. Status During Power-On Reset, Warm Reset and Power-down Mode
Note: 1. The SR_cod and PeriphMode bits in the VM Register are always cleared to ‘0’ on Power-On Reset or Warm Reset.
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MCU I/O
PLD Output
Address Out
Data Port
Peripheral I/O
PMMR0 and PMMR2
Macrocells flip-flop status
VM Register
All other registers
Port Configuration
Register
1
Valid after internal PSD
configuration bits are
loaded
Tri-stated
Tri-stated
Cleared to ‘0’
Cleared to ‘0’ by internal
Power-On Reset
Initialized, based on the
selection in PSDsoft
Express
Configuration menu
Cleared to ‘0’
Input mode
Tri-stated
Power-On Reset
Power-On Reset
Valid
Tri-stated
Depends on .re and .pr
equations
Initialized, based on the
selection in PSDsoft
Express
Configuration menu
Input mode
Tri-stated
Tri-stated
Unchanged
Cleared to ‘0’
Warm Reset
Warm Reset
Unchanged
Depends on inputs to PLD
(addresses are blocked in
PD mode)
Not defined
Tri-stated
Tri-stated
Unchanged
Depends on .re and .pr
equations
Unchanged
Unchanged
Power-down Mode
Power-down Mode