mr0a16a Freescale Semiconductor, Inc, mr0a16a Datasheet - Page 10

• Manufacturer Part Number: mr0a16a
• Description: 64k X 16-bit 3.3-v Asynchronous Magnetoresistive Ram
• Manufacturer: Freescale Semiconductor, Inc

Timing Specifications
Write Mode
10
NOTES:
Write cycle time
Address set-up time
Address valid to end of write (G high)
Address valid to end of write (G low)
Write pulse width (G high)
Write pulse width (G low)
Data valid to end of write
Data hold time
Write low to data Hi-Z
Write high to output active
Write recovery time
1
2
3
4
5
6
7
8
9
A write occurs during the overlap of E low and W low.
Due to product sensitivities to noise, power supplies must be properly grounded and decoupled and
bus contention conditions must be minimized or eliminated during read and write cycles.
If G goes low at the same time or after W goes low, the output will remain in a high-impedance state.
After W, E, or UB/LB has been brought high, the signal must remain in steady-state high for a minimum
of 2 ns.
The minimum time between E being asserted low in one cycle to E being asserted low in a subsequent
cycle is the same as the minimum cycle time allowed for the device.
All write cycle timings are referenced from the last valid address to the first transition address.
This parameter is sampled and not 100% tested.
Transition is measured ±200 mV from steady-state voltage.
At any given voltage or temperature, t
6
Table 10. Write Cycle Timing 1 (W Controlled)
Parameter
7, 8, 9
MR0A16A Advanced Information Data Sheet, Rev. 2
7, 8, 9
WLQZ
max < t
WHQX
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
t
WLWH
WLWH
DVWH
WHDX
WHQX
AVWH
AVWH
WHAX
AVWL
WLEH
WLEH
WLQZ
AVAV
min.
Min
35
18
20
15
15
10
12
0
0
0
3
1, 2, 3, 4, 5
Max
12
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—
—
—
—
—
—
—
—
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Freescale Semiconductor
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns