hyb18t512160af-5 Infineon Technologies Corporation, hyb18t512160af-5 Datasheet - Page 78

• Manufacturer Part Number: hyb18t512160af-5
• Description: 512-mbit Ddr2 Sdram
• Manufacturer: Infineon Technologies Corporation

5.2
Table 25
Symbol
V
V
V
V
V
1)
2) The value of
3) Peak to peak ac noise on
4)
Table 26
Parameter / Condition
Termination resistor impedance value for
EMRS(1)[A6,A2] = [0,1]; 75 Ohm
Termination resistor impedance value for
EMRS(1)[A6,A2] =[1,0]; 150 Ohm
Termination resistor impedance value for
EMRS(1)(A6,A2)=[1,1]; 50 Ohm
Deviation of
1)
2) Measurement Definition for
Table 27
Symbol
IIL
IOL
1) all other pins not under test = 0 V
2) DQ’s, LDQS, LDQS, UDQS, UDQS, DQS, DQS, RDQS, RDQS are disabled and ODT is turned off
Data Sheet
DD
DDDL
DDQ
REF
TT
V
is
V
to
respectively. Rtt(eff) = (
delta
Measurement Definition for Rtt(eff): Apply
DDQ
TT
V
is not applied directly to the device.
expected to be about 0.5 ×
REF
tracks with
V
M
, and must track variations in die dc level of
= ((2 x
V
DC Characteristics
Recommended DC Operating Conditions (SSTL_18)
ODT DC Electrical Characteristics
Input and Output Leakage Currents
Parameter / Condition
Input Leakage Current; any input 0 V <
Output Leakage Current; 0 V <
Parameter
Supply Voltage
Supply Voltage for DLL
Supply Voltage for Output
Input Reference Voltage
Termination Voltage
M
V
with respect to
REF
V
V
may be selected by the user to provide optimum noise margin in the system. Typically the value of
M
DD
/
,
V
V
DDQ
DDDL
V
IH(ac)
V
) – 1) x 100%
REF
V
tracks with
M
–
: Turn ODT on and measure voltage (
V
may not exceed ± 2%
V
V
DDQ
DDQ
IL(ac)
/ 2
of the transmitting device and
) /(
V
V
I
(
DD
TT
V
V
IHac
. AC parameters are measured with
is a system supply for signal termination resistors, is expected to be set equal
IH(ac)
Rating
Min.
1.7
1.7
1.7
0.49 ×
V
V
) –
REF
OUT
and
I
(
V
V
– 0.04
<
REF
Symbol
Rtt1(eff)
Rtt2(eff)
Rtt3(eff)
delta
V
ILac
V
V
V
IL(ac)
V
DDQ
REF
)).
.
DDQ
IN
78
to test pin separately, then measure current
V
<
(dc)
M
V
DD
Typ.
1.8
1.8
1.8
0.5 ×
V
REF
V
HYB18T512[40/80/16]0AF–[3/3S/3.7/5]
Min.
60
120
40
–6.00
V
REF
M
V
) at test pin (midpoint) with no load:
DDQ
is expected to track variations in
Nom.
75
150
50
—
V
Min.
–2
–5
DD
1.9
1.9
0.51 ×
V
Max.
1.9
REF
,
AC & DC Operating Conditions
V
DDQ
+ 0.04
512-Mbit DDR2 SDRAM
Max.
90
180
60
+ 6.00
V
and
DDQ
Max.
+2
+5
V
09112003-SDM9-IQ3P
DDDL
tied together.
Unit
Ω
Ω
Ω
%
Rev. 1.3, 2005-01
Unit
V
V
V
V
V
Unit
µA
µA
I
(
V
IHac
V
DDQ
) and
.
Note
1)
1)
1)
2)3)
4)
Note
1)
1)
1)
2)
Note
1)
2)
I
(
V
V
ILac
REF
)