hyb18t512161bf-33 Infineon Technologies Corporation, hyb18t512161bf-33 Datasheet - Page 13

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hyb18t512161bf-33

Manufacturer Part Number
hyb18t512161bf-33
Description
512-mbit X16 Gddr2 Dram
Manufacturer
Infineon Technologies Corporation
Datasheet
Table 2
Ball#/Pin#
E7, F2, F8, H2,
H8
J7
J3,N1,P9
Not Connected 16 organization
A2, E2, L1, R3,
R7, R8
Other Pins 16 organization
K9
Table 3
Abbreviation
I
O
I/O
AI
PWR
GND
NC
Table 4
Abbreviation
SSTL
LV-CMOS
CMOS
OD
Data Sheet
Pin Configuration of DDR SDRAM
Abbreviations for Pin Type
Abbreviations for Buffer Type
Name
V
V
V
NC
ODT
SSQ
SSDL
SS
I
Pin
Type
PWR
PWR
PWR
NC
CMOS Levels
Description
Standard input-only pin. Digital levels.
Output. Digital levels.
I/O is a bidirectional input/output signal.
Input. Analog levels.
Power
Ground
Not Connected
Description
Serial Stub Terminated Logic (SSTL_18)
Low Voltage CMOS
Open Drain. The corresponding pin has 2 operational states, active low and tristate,
and allows multiple devices to share as a wire-OR.
Buffer
Type
SSTL
Function
Power Supply
Power Supply
Power Supply
Not Connected
On-Die Termination Control
13
512-Mbit Double-Data-Rate-Two SDRAM
Pin Configuration and Block Diagrams
HYB18T512161BF–22/25/28/33
05102005-C5U8-7TLE
Rev. 1.1, 2005-08

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