at45db081d-su-sl955 ATMEL Corporation, at45db081d-su-sl955 Datasheet - Page 22

• Manufacturer Part Number: at45db081d-su-sl955
• Description: 8-megabit 2.5-volt Or 2.7-volt Dataflash
• Manufacturer: ATMEL Corporation

11. Additional Commands
11.1
11.2
11.3
22
Main Memory Page to Buffer Transfer
Main Memory Page to Buffer Compare
Auto Page Rewrite
AT45DB081D
A page of data can be transferred from the main memory to either buffer 1 or buffer 2. To start
the operation for the DataFlash standard page size (264 bytes), a 1-byte opcode, 53H for buffer
1 and 55H for buffer 2, must be clocked into the device, followed by three address bytes com-
prised of 3 don’t care bits, 12 page address bits (PA11 - PA0), which specify the page in main
memory that is to be transferred, and 9 don’t care bits. To perform a main memory page to buffer
transfer for the binary page size (256 bytes), the opcode 53H for buffer 1 or 55H for buffer 2,
must be clocked into the device followed by three address bytes consisting of 4 don’t care bits,
12 page address bits (A19 - A8) which specify the page in the main memory that is to be trans-
ferred, and 8 don’t care bits. The CS pin must be low while toggling the SCK pin to load the
opcode and the address bytes from the input pin (SI). The transfer of the page of data from the
main memory to the buffer will begin when the CS pin transitions from a low to a high state. Dur-
ing the transfer of a page of data (t
transfer has been completed.
A page of data in main memory can be compared to the data in buffer 1 or buffer 2. To initiate
the operation for DataFlash standard page size, a 1-byte opcode, 60H for buffer 1 and 61H for
buffer 2, must be clocked into the device, followed by three address bytes consisting of 3 don’t
care bits, 12 page address bits (PA11 - PA0) that specify the page in the main memory that is to
be compared to the buffer, and 9 don’t care bits. To start a main memory page to buffer compare
for a binary page size, the opcode 60H for buffer 1 or 61H for buffer 2, must be clocked into the
device followed by three address bytes consisting of 4 don’t care bits, 12 page address bits
(A19 - A8) that specify the page in the main memory that is to be compared to the buffer, and
8 don’t care bits. The CS pin must be low while toggling the SCK pin to load the opcode and the
address bytes from the input pin (SI). On the low-to-high transition of the CS pin, the data bytes
in the selected main memory page will be compared with the data bytes in buffer 1 or buffer 2.
During this time (t
the compare operation, bit 6 of the status register is updated with the result of the compare.
This mode is only needed if multiple bytes within a page or multiple pages of data are modified in
a random fashion within a sector. This mode is a combination of two operations: Main Memory
Page to Buffer Transfer and Buffer to Main Memory Page Program with Built-in Erase. A page of
data is first transferred from the main memory to buffer 1 or buffer 2, and then the same data
(from buffer 1 or buffer 2) is programmed back into its original page of main memory. To start the
rewrite operation for the DataFlash standard page size (264 bytes), a 1-byte opcode, 58H for
buffer 1 or 59H for buffer 2, must be clocked into the device, followed by three address bytes
comprised of 3 don’t care bits, 12 page address bits (PA11-PA0) that specify the page in main
memory to be rewritten and 9 don’t care bits. To initiate an auto page rewrite for a binary page
size (256 bytes), the opcode 58H for buffer 1 or 59H for buffer 2, must be clocked into the device
followed by three address bytes consisting of 4 don’t care bits, 12 page address bits (A19 - A8)
that specify the page in the main memory that is to be written and 8 don’t care bits. When a low-
to-high transition occurs on the CS pin, the part will first transfer data from the page in main
memory to a buffer and then program the data from the buffer back into same page of main
memory. The operation is internally self-timed and should take place in a maximum time of t
During this time, the status register will indicate that the part is busy.
COMP
), the status register will indicate that the part is busy. On completion of
XFR
), the status register can be read to determine whether the
3596I–DFLASH–4/08
EP
.