at45db321c ATMEL Corporation, at45db321c Datasheet - Page 16
![no-image](/images/manufacturer_photos/0/0/79/atmel_corporation_sml.jpg)
at45db321c
Manufacturer Part Number
at45db321c
Description
32-megabit 2.7 Volt Dataflash At45db321c For New Designs Use At45db321d
Manufacturer
ATMEL Corporation
Datasheet
1.AT45DB321C.pdf
(40 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
at45db321c-CC
Manufacturer:
ATMEL
Quantity:
1 831
Part Number:
at45db321c-CNC
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Part Number:
at45db321c-CNU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Part Number:
at45db321c-CU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Part Number:
at45db321c-RI
Manufacturer:
AT
Quantity:
20 000
Company:
Part Number:
at45db321c-RU
Manufacturer:
ATMEL
Quantity:
8
Part Number:
at45db321c-RU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Company:
Part Number:
at45db321c-TU
Manufacturer:
ATMEL
Quantity:
1 000
Company:
Part Number:
at45db321cT-U
Manufacturer:
ATMEL
Quantity:
5 510
Company:
Part Number:
at45db321cT-U
Manufacturer:
TI
Quantity:
5 510
7.4.6
7.4.7
16
Period
WP
Time
1
2
3
AT45DB321C
RESET
READY/BUSY
WP Pin
High
High
High
High
High
High
Low
Enable Sector Protection Command
Command Issued during Period 1 or 2
1
Command Not Issued Previously
The table below details the sector protection status for various scenarios of the WP pin, the
Enable Sector Protection command, and the Disable Sector Protection command.
A low state on the reset pin (RESET) will terminate the operation in progress and reset the inter-
nal state machine to an idle state. The device will remain in the reset condition as long as a low
level is present on the RESET pin. Normal operation can resume once the RESET pin is brought
back to a high level.
The device incorporates an internal power-on reset circuit, so there are no restrictions on the
RESET pin during power-on sequences. The RESET pin is also internally pulled high; therefore,
in low pin count applications, connection of the RESET pin is not necessary if this pin and fea-
ture will not be utilized. However, it is recommended that the RESET pin be driven high
externally whenever possible.
This open drain output pin will be driven low when the device is busy in an internally self-timed
operation. This pin, which is normally in a high state (through an external pull-up resistor), will be
pulled low during programming/erase operations, and page-to-buffer transfers.
The busy status indicates that the Flash memory array and one of the buffers cannot be
accessed; read and write operations to the other buffer can still be performed. During Page
Erase and Block Erase, read and write operations can be performed to both buffers.
Command Issued
Issue Command
–
–
x
Disable Sector Protection Command
2
Command Issued
Command Issued
Not Issued Yet
x
–
x
–
Sector Protection Status
3
Disabled
Disabled
Disabled
Enabled
Enabled
Enabled
Enabled
3387M–DFLASH–2/08