at45db321d-su-sl955 ATMEL Corporation, at45db321d-su-sl955 Datasheet - Page 35
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at45db321d-su-sl955
Manufacturer Part Number
at45db321d-su-sl955
Description
32-megabit 2.7-volt Dataflash
Manufacturer
ATMEL Corporation
Datasheet
1.AT45DB321D-SU-SL955.pdf
(54 pages)
Available stocks
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Part Number
Manufacturer
Quantity
Price
Part Number:
AT45DB321D-SU-SL955
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
19. Input Test Waveforms and Measurement Levels
20. Output Test Load
21. AC Waveforms
3597I–DFLASH–8/07
t
Six different timing waveforms are shown on
low when CS makes a high-to-low transition, and waveform 2 shows the SCK signal being high
when CS makes a high-to-low transition. In both cases, output SO becomes valid while the
SCK signal is still low (SCK low time is specified as t
RapidS serial interface but for frequencies up to 66 MHz. Waveforms 1 and 2 are compatible
with SPI Mode 0 and SPI Mode 3, respectively.
Waveform 3 and waveform 4 illustrate general timing diagram for RapidS serial interface. These
are similar to waveform 1 and waveform 2, except that output SO is not restricted to become
valid during the t
imum frequency = 66 MHz) of the RapidS serial case.
R
, t
F
< 2 ns (10% to 90%)
DRIVING
LEVELS
AC
WL
0.45V
period. These timing waveforms are valid over the full frequency range (max-
2.4V
DEVICE
UNDER
TEST
1.5V
30 pF
AT45DB321D [Preliminary]
page
AC
MEASUREMENT
LEVEL
36. Waveform 1 shows the SCK signal being
WL
). Timing waveforms 1 and 2 conform to
35