at29c432 ATMEL Corporation, at29c432 Datasheet

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at29c432

Manufacturer Part Number
at29c432
Description
Megabit 5-volt Flash With 256k E2prom Memory
Manufacturer
ATMEL Corporation
Datasheet
Features
Description
The AT29C432 is a CMOS memory specifically designed for applications requiring
both a high density nonvolatile program memory and a smaller nonvolatile data mem-
ory. The AT29C432 provides this in the form of a 4 megabit Flash array integrated
with a 256K bit full featured E
this device is its concurrent read while writing capability. This provides the host sys-
tem read access to the Flash program memory during the write cycle time of the
E
The two memory arrays share all I/O lines, Address lines and OE and WE inputs.
Each memory array has its own Chip Enable input: CEF for the Flash array and CEE
for the E
Additionally, Software Data Protection has been independently implemented for both
arrays and is always enabled. The AT29C432 has a pinout similar to the AT29C040A
Flash memory. A system designer using a Flash memory for program storage and
another smaller, non volatile memory for data storage can easily replace both memo-
ries with the AT29C432.
Pin Configurations
Pin Name Function
A0 - A18
OE
WE
I/O0 - I/O7 Data Inputs/Outputs
CEE
CEF
NC
2
PROM.
ConcurrentFlash
4 Megabit 5-volt Flash
256K bit Full Feature E
Pinout Similar to 32-Pin 4 Mb Flash
Data Memory Endurance: 10,000 cycles
Unique Architecture Allows the Flash Array
To Be Read During the E
Configured as a 512K x 8 Memory Array
120 ns Read Access Time
Sector Program Operation
JEDEC Standard Software Data Protection
Configured as a 32K x 8 Memory Array
Byte or Page (16 bytes) Write Capability
Write Cycle Time: 10 ms
JEDEC Standard Software Data Protection
2
Single Cycle Reprogram (No Erase Necessary)
2048 Sectors, 256-Bytes Wide
10 ms Sector Rewrite
PROM array.
Addresses
Output Enable
Write Enable
Chip Enable E
Chip Enable Flash
No Connect
Memory
2
PROM
2
PROM
2
2
PROM array on the same device. A unique feature of
PROM Write Cycle
Type 1
TSOP
4 Megabit
5-volt Flash with
256K E
Memory
AT29C432
ConcurrentFlash
Preliminary
2
PROM

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at29c432 Summary of contents

Page 1

... Description The AT29C432 is a CMOS memory specifically designed for applications requiring both a high density nonvolatile program memory and a smaller nonvolatile data mem- ory. The AT29C432 provides this in the form megabit Flash array integrated 2 with a 256K bit full featured E PROM array on the same device. A unique feature of this device is its concurrent read while writing capability ...

Page 2

... The state of adresses and A15 - A18 spec- ify the individual byte address within a sector and the state of addresses A4 - A14 define the sector to be written. The AT29C432 employs the JEDEC standard software data protection feature; therefore, each programming se- quence must be preceded by the three byte program com- mand sequence ...

Page 3

... This sequence should then immedi- ately be followed by one to sixteen bytes of data. After the last byte has been written, the AT29C432 will automat- ically time itself to completion of the internal write cycle. The write cycle is initiated by both WE and CEE going low; ...

Page 4

... With other programmable non- volatile memories internal high voltage operations prevent the reading of data while a write operation is in process. However, the AT29C432 is partitioned in a manner to al- low read operations from the Flash memory array during a 2 write operation within the E PROM memory array ...

Page 5

... I/O CC CEE = CEF = MHz OUT -400 4. -100 4. AT29C432 AT29C432-15 0°C - 70°C -40°C - 85°C 4.5V - 5. OUT Ai D OUT High Z High Z D OUT Undefined High Z ( ...

Page 6

... OE or CEF (CEE) whichever occurs first ACC pF). ACC after the falling 4. This parameter is characterized and is not 100% tested AT29C432-15 Max Min Max 100 120 150 120 0 150 Output Test Load ...

Page 7

... WE or CEF Pulse Width High t WPH t Byte Load Cycle Time BLC AC Flash Array Write Waveforms Note: 1. BYTE ADDRESS is the first destination address for the sector write operation. All write operations must begin with the three byte write enable sequence. AT29C432 Min Max 100 ...

Page 8

... PROM Array Write Waveforms Note: 1. Only A0 - A14 are valid address inputs for the E the first destination address for either a byte write or page write operation. All write operations, byte only or page write, must begin with the three byte write enable sequence. AT29C432 8 Min 0 50 ...

Page 9

... E E PROM’s internal write cycle defined by t PROM’s internal write cycle defined Having both CEF and CEE active simultaneously Having both CEF and CEE active simultaneously is an illegal state. illegal state. is not BLC AT29C432 . . WCE WCE 9 ...

Page 10

... Manufacture Code is read for Device Code is read for CEF = Low, CEE = High IH 3. The device does not remain in identification mode if powered down. 4. The device returns to standard operation mode. 5. Manufacturer Code: 1F Device Code: B4 AT29C432 10 (1) 2 PROM Software Product Identification Exit ENTER PRODUCT IDENTIFICATION ...

Page 11

... Lead, Plastic Thin Small Outline Package (TSOP) Dimensions in Millimeters and (Inches) * *Controlling dimension: millimeters Ordering Code Package AT29C432-12TC 40T AT29C432-12TI 40T AT29C432-15TC 40T AT29C432-15TI 40T Package Type AT29C432 Operation Range Commercial ( Industrial (- Commercial ( Industrial (- ...

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