stk16c88-45i Simtek Corporation, stk16c88-45i Datasheet - Page 4

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stk16c88-45i

Manufacturer Part Number
stk16c88-45i
Description
32kx8 Autostore+ Nvsram
Manufacturer
Simtek Corporation
Datasheet
STK16C88
Document Control #ML0018 Rev 2.0
SRAM READ CYCLES #1 & #2
Note f:
Note g: I/O state assumes E, G < V
Note h: Measured + 200mV from steady state output voltage.
SRAM READ CYCLE #1: Address Controlled
SRAM READ CYCLE #2: E and G Controlled
DQ (DATA OUT)
NO.
10
11
DQ (D ATA OUT)
1
2
3
4
5
6
7
8
9
27
Jan, 2008
ADDRESS
ADDR ESS
W must be high during SRAM READ cycles and low during SRAM WRITE cycles.
t
t
t
t
t
t
t
t
t
t
t
ELQV
AVAV
AVQV
GLQV
AXQX
ELQX
EHQZ
GLQX
GHQZ
ELICCH
EHICCL
I
f
CC
,
g
g
h
h
G
E
#1, #2
t
e
d
ELEH
,
e
SYMBOLS
f
t
t
t
t
t
t
t
t
t
t
t
IL
ACS
RC
AA
OE
OH
LZ
HZ
OLZ
OHZ
PA
PS
Alt.
and W > V
ST AND BY
t
ELI CC H
t
t
ELQ X
1 0
IH
AXQX
t
6
t
AV QV
G L Q X
; device is continuously selected.
5
Chip Enable Access Time
Read Cycle Time
Address Access Time
Output Enable to Data Valid
Output Hold after Address Change
Address Change or Chip Enable to Output Active
Address Change or Chip Disable to Output Inactive
Output Enable to Output Active
Output Disable to Output Inactive
Chip Enable to Power Active
Chip Disable to Power Standby
3
8
t
G L QV
4
t
t
EL Q V
E LE H
t
1
AVQV
2
AC T IVE
PARAMETER
3
4
t
AVAV
2
f
f, g
DATA VALID
t
EHAX
29
STK16C88-25
MIN
25
DAT A VAL ID
5
5
0
0
MAX
(V
25
25
10
10
10
25
t
GH Q Z
9
CC
t
STK16C88-45
EHQ Z
MIN
45
7
5
5
0
0
t
= 5.0V
EHI CC L
11
MAX
45
45
20
15
15
45
±
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
10%)

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