m5m5256dfp-70g Renesas Electronics Corporation., m5m5256dfp-70g Datasheet

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m5m5256dfp-70g

Manufacturer Part Number
m5m5256dfp-70g
Description
262144-bit 32768-word By 8-bit Cmos Static Ram
Manufacturer
Renesas Electronics Corporation.
Datasheet

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M5M5256DFP-70G
Manufacturer:
MIT
Quantity:
1 000
APPLICATION
PACKAGE
DESCRIPTION
FEATURE
organized as 32,768-words by 8-bits which is f abricated using
high-perf ormance 3 poly silicon CMOS technology . The use of
resistiv e load NMOS cells and CMOS periphery results in a high
density and low power static RAM. Stand-by current is small
enough f or battery back-up application. It is ideal f or the memory
sy stems which require simple interf ace.
outline package.
The M5M5256DFP,VP is 262,144-bit CMOS static RAMs
Especially the M5M5256DVP are packaged in a 28-pin thin small
M5M5256DFP,VP
M5M5256DFP,VP
M5M5256DFP,VP
•Single 3.0
•No clocks, no ref resh
•Data-Hold on +2.0V power supply
•Directly TTL compatible : all inputs and outputs
•Three-state outputs : OR-tie capability
•/OE prev ents data contention in the I/O bus
•Common Data I/O
•Battery backup capability
•Low stand-by current .......... 0.05µA(ty p.)
M5M5256DFP
M5M5256DVP
Small capacity m emory units
Ty pe
-70XG
-70GI
-70G
~
5.5V power supply
Access
(max)
70ns
70ns
70ns
: 28 pin 450 mil SOP
: 28pin 8 X 13.4 mm TSOP
time
Temperature
-40~85
Oprating
0~70
0~70
°C
°C
°C
2
Power supply current
(Vcc= 5.5V)
(Vcc= 3.6V)
Activ e
45mA
25mA
(max)
M5M5256DFP,VP -70G,-70GI,-70XG
(Vcc= 3.0V Typical)
262144-BIT (32768-WORD BY 8-BIT) CMOS STATIC RAM
Stand-by
(Vcc= 5.5V)
(Vcc= 3.6V)
(Vcc= 5.5V)
(Vcc= 3.6V)
(Vcc= 5.5V)
(Vcc= 3.6V)
0.05µA
2.4µA
20µA
12µA
40µA
24µA
(max)
5µA
PIN CONFIGURATION (TOP VIEW)
22
23
24
25
26
27
28
1
2
3
4
5
6
7
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
DQ1
DQ2
DQ3
GND
A11
A9
A8
A13
Vcc
A14
A12
A7
A6
A5
A4
A3
/OE
/W
10
11
12
13
14
Outline 28P2W-C (FP)
1
2
3
4
5
6
7
8
9
Outline 28P2C-A (VP)
M5M5256DVP
RENESAS LSIs
18
17
15
28
27
26
25
24
23
22
21
20
19
16
GND
Vcc
/W
A13
A8
A9
A11
/OE
A10
/S
DQ8
DQ7
DQ6
DQ5
DQ4
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
A10
A0
A1
A2
/S
21
20
19
18
17
16
15
14
13
12
11
10
9
8
1

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m5m5256dfp-70g Summary of contents

Page 1

... DESCRIPTION The M5M5256DFP,VP is 262,144-bit CMOS static RAMs organized as 32,768-words by 8-bits which is f abricated using high-perf ormance 3 poly silicon CMOS technology . The use of resistiv e load NMOS cells and CMOS periphery results in a high density and low power static RAM. Stand-by current is small enough f or battery back-up application ...

Page 2

... The operation mode of the M5M5256DFP,VP is determined by a combination of the dev ice control inputs /S, /W and /OE. Each mode is summarized in the f unction table. A write cy cle is executed whenev er the low lev erlaps with the low lev el /S. The address must be set up bef ore the write cy cle and must be stable during the entire cy cle ...

Page 3

... Note 0: Direction f or current f lowing into positiv e (no mark pical v alue is one 25° are periodically sampled and are not 100% tested M5M5256DFP,VP -70G,-70GI,-70XG 262144-BIT (32768-WORD BY 8-BIT) CMOS STATIC RAM Conditions With respect to GND Ta=25°C -G,-XG -GI ...

Page 4

... Output disable time from /OE high dis t (W) Output enable time from /W high en t (OE) Output enable time from /OE low en M5M5256DFP,VP -70G,-70GI,-70XG 262144-BIT (32768-WORD BY 8-BIT) CMOS STATIC RAM Parameter RENESAS LSIs Limits1 Limits2 Vcc=3.3±0.3V Vcc=5.0±0.5V Unit Min Max ...

Page 5

... TIMING DIAGRAMS Read cycle / "H" lev el Write cycle (/W control mode (Note 3) / (Note 3) M5M5256DFP,VP -70G,-70GI,-70XG 262144-BIT (32768-WORD BY 8-BIT) CMOS STATIC RAM ( (S) a (Note 3) t (OE (OE) en (Note 3) t ...

Page 6

... If /W goes low simultaneously with or prior to /S, the outputs remain in the high impedance state Don't apply inv erted phase signal externally when DQ pin is output mode ten, tdis are periodically sampled and are not 100% tested. M5M5256DFP,VP -70G,-70GI,-70XG 262144-BIT (32768-WORD BY 8-BIT) CMOS STATIC RAM t ...

Page 7

... TIMING REQUIREMENTS Symbol Parameter t Power down set up time su (PD) t Power down recov ery time rec (PD) (3) POWER DOWN CHARACTERISTICS /S control mode Vcc 2.2V /S M5M5256DFP,VP -70G,-70GI,-70XG 262144-BIT (32768-WORD BY 8-BIT) CMOS STATIC RAM Test conditions _ 2.2V < V CC(PD 2V< V < 2.2V CC(PD) ~25°C _ > Vcc ...

Page 8

... P lease contact Renesas T echnology Corporation for further details on these m aterials or the products contained therein. REJ03C0054 © 2003 Renesas Technology Corp. New publication, effective Feb 2004. Specifications subject to change without notice M5M5256DFP,VP -70G,-70GI,-70XG 262144-BIT (32768-WORD BY 8-BIT) CMOS STATIC RAM Nippon Bldg.,6-2,Otemachi 2-chome,Chiyoda-ku,Tokyo,100-0004 Japan RENESAS LSIs ...

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