m5m5256dfp-70g Renesas Electronics Corporation., m5m5256dfp-70g Datasheet - Page 6

• Manufacturer Part Number: m5m5256dfp-70g
• Description: 262144-bit 32768-word By 8-bit Cmos Static Ram
• Manufacturer: Renesas Electronics Corporation.

Write cycle ( /S control mode)
DQ
A
/S
/W
Limits1:Vcc=3.3±0.3V
Limits2:Vcc=5.0±0.5V
(4) MEASUREMENT CONDITIONS
0~ 14
Input pulse level .............. V
Input rise and fall time ..... 5ns
Reference level ................ V
Output load ...................... Fig.1, CL=30pF
Input pulse level .............. V
Input rise and fall time ..... 5ns
Reference level ................ V
Output load ...................... Fig.2, CL=100pF
1~ 8
Note 3 : Hatching indicates the state is "don't care".
4 : Writing is executed in ov erlap of /S and /W low.
5 : If /W goes low simultaneously with or prior to /S, the outputs remain in the high impedance state.
6 : Don't apply inv erted phase signal externally when DQ pin is output mode.
7 : ten, tdis are periodically sampled and are not 100% tested.
(Note 3)
Transition is measured ±500mV from steady
state voltage. (for ten,tdis)
Transition is measured ±500mV from steady
state voltage. (for ten,tdis)
IH
IH
OH
OH
=2.4V,V
=2.4V,V
=V
=V
(Note 5)
OL
OL
CL=5pF (for ten,tdis)
CL=5pF (for ten,tdis)
=1.5V
=1.5V
t
su
(A)
IL
IL
=0.4V
=0.6V
M5M5256DFP,VP -70G,-70GI,-70XG
(Note 4)
t
t
su
262144-BIT (32768-WORD BY 8-BIT) CMOS STATIC RAM
CW
(S)
t
su
DATA IN
STABLE
(D)
t
h
t
(D)
rec
(W)
(Including
scope and JIG)
(Including
scope and JIG)
DQ
DQ
(Note 3)
Fig.1 Output load
Fig.2 Output load
RENESAS LSIs
990
C
L
1.8k
Vcc
C
L
6