tc58dvm92a3ta00 TOSHIBA Semiconductor CORPORATION, tc58dvm92a3ta00 Datasheet - Page 26

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tc58dvm92a3ta00

Manufacturer Part Number
tc58dvm92a3ta00
Description
512-mbit 64 M ? 8 Bits Cmos Nand E Prom
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
TC58DVM92A3TA00
Manufacturer:
TOSHIBA/东芝
Quantity:
20 000
(6)
(7)
command
RY
/
WE
RE
CE
BY
Addressing for program operation
the block to MSB (most significant bit) page of the block. Random page address programming is prohibited.
Status Read during a Read operation
mode.
returns to Read mode. In this case, data output starts automatically from address N and address input is
unnecessary.
From the LSB page to MSB page
DATA IN: Data (1)
Within a block, the pages must be programmed consecutively from the LSB (least significant bit) page of
The device status can be read out by inputting the Status Read command “70h” in Read mode.
Once the device has been set to Status Read mode by a “70h” command, the device will not return to Read
Therefore, a Status Read during a Read operation is prohibited.
However, when the Read command “00h” is inputted during [A], Status mode is reset and the device
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Page 0
Page 1
Page 2
00
Address N
Data (32)
Data register
(16)
(32)
(1)
(2)
(3)
Figure 15. page programming within a block
Figure 16.
26
Ex.) Random page program (Prohibition)
DATA IN: Data (1)
command input
Page 15
Page 31
Status Read
Page 0
Page 1
Page 2
70
Data (32)
Status Read
Data register
TC58DVM92A3TA00
(16)
(32)
(2)
(3)
(1)
00
[A]
Status output
2008-12-10

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